System and method for distributed forwarding logic for cyclic data-pipeline coherency
US-2025245014-A1 · Jul 31, 2025 · US
Gate array
Gate array · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06F2015/768 |
| Official title | {Gate array} |
| Display label | Gate array |
| Total patents | 55 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is rapidly declining.
| Year | Patents |
|---|---|
| 2016 | 1 |
| 2017 | 1 |
| 2018 | 5 |
| 2019 | 9 |
| 2020 | 8 |
| 2021 | 10 |
| 2022 | 7 |
| 2023 | 7 |
| 2024 | 5 |
| 2025 | 2 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Fault-tolerant scalable modular quantum computer architecture with an enhanced control of multi-mode couplings between trapped ion qubits
US-12299537-B2 · May 13, 2025 · US
Fault-tolerant scalable modular quantum computer architecture with an enhanced control of multi-mode couplings betwen trapped ion qubits
US-2024362512-A1 · Oct 31, 2024 · US
Issuing instructions on a vector processor
US-12056083-B2 · Aug 6, 2024 · US
Heterogeneous accelerator for highly efficient learning systems
US-2024193111-A1 · Jun 13, 2024 · US
Heterogeneous accelerator for highly efficient learning systems
US-11921656-B2 · Mar 5, 2024 · US
Issuing instructions on a vector processor
US-2024028557-A1 · Jan 25, 2024 · US
Fault-tolerant scalable modular quantum computer architecture with an enhanced control of multi-mode couplings between trapped ion qubits
US-11816537-B2 · Nov 14, 2023 · US
Acceleration system and dynamic configuration method thereof
US-11789894-B2 · Oct 17, 2023 · US
Issuing instructions on a vector processor
US-11741044-B2 · Aug 29, 2023 · US
Selecting, from a pool of items, a selected item to be associated with a given request
US-11720511-B2 · Aug 8, 2023 · US
Acceleration System and Dynamic Configuration Method Thereof
US-2023237008-A1 · Jul 27, 2023 · US
Issuing instructions on a vector processor
US-2023214352-A1 · Jul 6, 2023 · US
Technologies for hardware microservices accelerated in xpu
US-2023185760-A1 · Jun 15, 2023 · US
Display device and system
US-11531200-B2 · Dec 20, 2022 · US
Selecting, from a pool of items, a selected item to be associated with a given request
US-2022391342-A1 · Dec 8, 2022 · US
Pipeline including separate hardware data paths for different instruction types
US-11494192-B2 · Nov 8, 2022 · US
Dynamic deep learning processor architecture
US-11442889-B2 · Sep 13, 2022 · US
Heterogeneous accelerator for highly efficient learning systems
US-2022138132-A1 · May 5, 2022 · US
FPGA coprocessor with sparsity and density modules for execution of low and high parallelism portions of graph traversals
US-11263168-B2 · Mar 1, 2022 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06F2015/768?
- CPC G06F2015/768 is the Cooperative Patent Classification code for “Gate array.”
- How many patents are filed under CPC G06F2015/768 (Gate array)?
- Our database includes 55 publications tagged with this CPC code.
- Is patent activity under CPC G06F2015/768 growing?
- Publication counts under this code: 5 in 2024 vs 2 in 2025 (latest complete years).