Fault-tolerant scalable modular quantum computer architecture with an enhanced control of multi-mode couplings between trapped ion qubits

Patent metadata

Field	Value
Publication number	US-11816537-B2
Application number	US-202117384574-A
Country	US
Kind code	B2
Filing date	Jul 23, 2021
Priority date	Aug 2, 2013
Publication date	Nov 14, 2023
Grant date	Nov 14, 2023

Abstract

A modular quantum computer architecture is developed with a hierarchy of interactions that can scale to very large numbers of qubits. Local entangling quantum gates between qubit memories within a single modular register are accomplished using natural interactions between the qubits, and entanglement between separate modular registers is completed via a probabilistic photonic interface between qubits in different registers, even over large distances. This architecture is suitable for the implementation of complex quantum circuits utilizing the flexible connectivity provided by a reconfigurable photonic interconnect network. The subject architecture is made fault-tolerant which is a prerequisite for scalability. An optimal quantum control of multimode couplings between qubits is accomplished via individual addressing the qubits with segmented optical pulses to suppress crosstalk in each register, thus enabling high-fidelity gates that can be scaled to larger qubit registers for quantum computation and simulation.

First claim

What is being claimed is:

1. A quantum computer comprising:
a processor;
a plurality of modular elementary logic units (ELUs), each ELU including a plurality of qubits, the plurality of qubits including ion qubits;
a photonic interconnect network operatively coupled to the plurality of ELUs and configured for multiplexing under control of the processor;
a control sub-system configured to control qubit-state-dependent forces;
a photon detection sub-system operatively coupled to a first and second quantum gates via the photonic interconnect network;
a measurement sub-system operatively coupled to the detection sub-system and the first and second quantum gates; and
the ion qubits including a laser sub-system having
a first laser configured to initialize each ion qubits in a respective ELU;
a second continuous wave laser configured to stimulate Raman transitions between the ion qubits; and
a third resonant laser configured to participate in ion qubits state measurement.

2. The quantum computer of claim 1 , wherein the laser sub-system is adapted such that the second laser emits a beam having a pulse shape that is evenly partitioned into (2 N q+1) segments wherein N q is the number the ion qubits in the respective ELU.

3. The quantum computer of claim 2 , wherein the control sub-system is operatively coupled with the second laser and configured to apply a set of control parameters to the beam, the set of control parameters including a predetermined addressing of the ion qubits, a spectral phase and an amplitude.

4. The quantum computer of claim 1 , wherein the processor is configured to form at least one quantum circuit supported by a multi-dimensional quantum computational structure having a fault-tolerant probabilistic connection between respective distant modular ELUs established via the photonic interconnect network.

5. The quantum computer of claim 4 , wherein each of the respective ELUs includes at least one of a plurality of communication ports coupled to the photonic interconnect network, and further wherein the processor is operative for time-division multiplexing the plurality of communication ports.

6. The quantum computer of claim 5 , further comprising a fault-tolerance sub-system operatively coupled to at least one of first and second quantum gates.

7. The quantum computer of claim 1 , wherein at least one ELU includes at least one chain of physical qubits, refrigerator qubits interposed between quantum gates, and communication qubits coupled to the photonic interconnect network.

8. The quantum computer of claim 7 , wherein the refrigerator qubits exhibit a different species than the physical qubits.

9. The quantum computer of claim 7 , further comprising an isolating mechanism for isolating the communication qubits from the physical qubits.

10. The quantum computer of claim 1 , wherein the photon detection sub-system includes an array of N ELU /2 Bell state detectors.

11. The quantum computer of claim 1 ,
wherein the processor is configured to apply entanglement swapping protocols to coordinate entanglement generation time with communication times.

12. The quantum computer of claim 1 , including a quantum adder circuit configured to compute a sum of two n-bit integers and employing 6n logical qubits placed on 1.5n ELUs to compute said sum of two n-bit integers at a first concatenation level of Steane code encoding.

Assignees

• Univ Maryland
• Univ Duke

Inventors

• Monroe Christopher
• Kim Jungsang

Classifications

• G06N10/70

  Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation · CPC title

• G06N10/40 Primary

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• G06N10/00 Primary

  Quantum computing, i.e. information processing based on quantum-mechanical phenomena · CPC title

• G06F15/76

  Architectures of general purpose stored program computers (with program plugboard G06F15/08; multicomputers G06F15/16) · CPC title

• G02F1/113

  Circuit or control arrangements · CPC title