Method and apparatus for use in improving linearity of MOSFETS using an accumulated charge sink

Patent metadata

Field	Value
Publication number	US-RE48944-E
Application number	US-202016738787-A
Country	US
Kind code	E1
Filing date	Jan 9, 2020
Priority date	Jul 11, 2005
Publication date	Feb 22, 2022
Grant date	Feb 22, 2022

Abstract

A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

First claim

What is claimed is:

1. A Radio Frequency (RF) switching method comprising the steps of:
providing an RF input port;
configuring the RF input port to receive an RF signal;
providing an RF output port;
providing a switch transistor grouping having a first node and second node;
coupling the first node of the switch transistor grouping to the RF input port;
coupling the second node of the switch transistor grouping to the RF output port;
providing a shunt transistor grouping having a first node and a second node, the shunt transistor grouping comprising one or more accumulated charge control N-type MOSFETs (ACC N-MOSFET) wherein each of the one or more ACC-NMOSFETs comprises:
a gate, drain, source and a gate oxide layer, where the gate oxide layer is positioned between the gate and a body; and
an accumulated charge sink (ACS) region connected to the body;

coupling the first node of the shunt transistor grouping to the RF input port;
coupling the second node of the switch shunt transistor grouping to ground;
in a first state:
(a) enabling the switch transistor grouping and disabling the shunt transistor grouping thereby passing the RF input signal from the RF input port to the RF output port;
(b) biasing each of the one or more ACC-MOSFETs ACC N-MOSFETs to operate in an accumulated charge regime;
(c) for each of the one or more ACC N-MOSFETs: applying a bias voltage, to the ACS region to control or to remove accumulated charge from the body via the ACS region, wherein the bias voltage is negative with respect to ground, the drain and the source;

in a second state:
(d) enabling the shunt transistor grouping and disabling the switch transistor grouping, thereby isolating the RF input port from the RF output port.

2. The RF switching method of claim 1 used in an RF switching circuit.

3. The RF switching method of claim 2 , wherein the RF switching circuit is implemented inside a cellular communication device.

4. The RF switching method of claim 3 , wherein the cellular communication device is a GSM cell phone.

5. The RF switching method of claim 3 , wherein the cellular communication device is used in a cellular communication system where the harmonics are at a level below −30 dBm.

6. The RF switching method of claim 2 , wherein steps (b)-(c) are for improving linearity, harmonic and intermodulation suppression, and power consumption performance characteristics of the RF switching circuit.

7. The RF switching method of claim 1 , further comprising the step of fabricating the one or more ACC N-MOSFETs on direct silicon bond substrates by bonding and electrically attaching a film of single-crystal silicon onto a base insulating substrate or on an insulating layer on a base silicon substrate.

8. The RF switching method of claim 1 , wherein all the steps are implemented on a single die.

9. The RF switching method of claim 1 , wherein all the steps are implemented on a single die.

10. The RF switching method of claim 1 , further comprising the step of connecting drain-to-source resistors to the one or more ACC N-MOSFET; the drain-to-source resistors providing a conduction path between corresponding one or more ACC-N-MOSFETs' drains and sources.

11. The RF switching method of claim 10 , further comprising the step of coupling a gate resistor to each gate of each of the one or more ACC N-MOSFETs.

12. A Radio Frequency (RF) switching method comprising the steps of:
providing a first RF port;
configuring the first RF port to receive or output a first RF signal;
providing a second RF port;
configuring the second RF port to receive or output a second RF signal;
providing an RF common port;
providing a first switch transistor grouping having a first node and a second node, the first switch transistor grouping comprising a first one or more accumulated charge control N-type MOSFETs (ACC N-MOSFETs), wherein each of the first one or more ACC-NMOSFETs comprises:
a first gate, first drain, first source and a first gate oxide layer positioned between the first gate and a first body; and
a first accumulated charge sink (ACS) region connected to the first body;

coupling the first node of the first switch transistor grouping to the first RF port;
coupling the second node of the first switch transistor grouping to the RF common port;
providing a second switch transistor grouping having a first node and a second node, the second switch transistor grouping comprising a second one or more ACC N-MOSFETs, wherein each of the second one or more ACC N-MOSFETs comprises:
a second gate, second drain, second source and a second gate oxide layer positioned between the second gate and a second body; and
a second accumulated charge sink (ACS) region connected to the second body;

coupling the first node of the second switch transistor grouping to the second RF port;
coupling the second node of the second switch transistor grouping to the RF common port;
in a first state:
(a) enabling the first switch transistor grouping and disabling the second switch transistor grouping, thereby electrically coupling the first RF port with the RF common port and isolating the second RF port from the RF common port;
(b) biasing each of the second one or more ACC N-MOSFETs to operate in an accumulated charge regime;
(c) for each of the second one or more ACC N-MOSFETs: applying a second bias voltage, to the second ACS region to control or to remove accumulated charge from the second body via the second ACS region, wherein the second bias voltage is negative with respect to ground, the second drain and the second source;

in a second state:
(d) enabling the second switch transistor grouping and disabling the first switch transistor grouping thereby electrically coupling the second RF port with the RF common port and isolating the first RF port from the RF common port;
(e) biasing each of the first one or more ACC N-MOSFETs to operate in an accumulated charge regime;
(f) for each of the first one or more ACC N-MOSFETs: applying a first bias voltage, to the first ACS region to control or to remove accumulated charge from the first body via the first ACS region, wherein the first bias voltage is negative with respect to ground, the first drain and the first source.

13. The RF switching method of claim 12 used in an RF switching circuit.

14. The RF switching method of claim 13 , wherein the RF switching circuit is implemented inside a cellular communication device.

15. The RF switching method of claim 14 , wherein the cellular communication device is a GSM cell phone.

16. The RF switching method of claim 14 , wherein the cellular communication device is used in a cellular communication system.

17. The RF switching method of claim 12 , wherein steps (b)-(c) and (e)-(f) are for improving linearity, harmonic and intermodulation suppression, and power consumption performance characteristics of the RF switching circuit.

18. The RF switching method of claim 12 , further comprising the step of fabricating the first and the second one or more ACC N-MOSFETs on direct silicon bond substrates by bonding and electrically attaching a film of single-crystal silicon onto a base insulating substrate or on an insulating layer on a base silicon substrate.

Assignees

• Psemi Corp

Inventors

• Brindle Christopher N
• Stuber Michael A
• Kelly Dylan J
• Kemerling Clint L
• Imthurn George P
• Welstand Robert B
• Burgener Mark L

Classifications

• H10D30/6741

  Group IV materials, e.g. germanium or silicon carbide (TFTs having oxide semiconductors H10D30/6755) · CPC title

• H10D30/675

  Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium · CPC title

• H10D62/393

  Body regions of DMOS transistors or IGBTs  (cell layout of DMOS H10D62/127) · CPC title

• H10D62/115

  Dielectric isolations, e.g. air gaps · CPC title

• H10D30/6711

  by using electrodes contacting the supplementary regions or layers · CPC title