Amplifier with variable feedback impedance

Patent metadata

Field	Value
Publication number	US-9276526-B2
Application number	US-201314040444-A
Country	US
Kind code	B2
Filing date	Sep 27, 2013
Priority date	Sep 27, 2013
Publication date	Mar 1, 2016
Grant date	Mar 1, 2016

Abstract

A variable feedback impedance is presented capable of providing high linearity (e.g. as represented by IP 2 and IP 3 ) and high linear range (e.g. as represented by P 1 dB) when used in a feedback path of an RF amplifier in the presence of high voltage amplitudes.

First claim

The invention claimed is:

1. A radio frequency (RF) amplifier arrangement comprising:
an RF amplifier;
an input terminal of the RF amplifier arrangement connected to an input of the RF amplifier;
an output terminal of the RF amplifier arrangement connected to an output of the RF amplifier;
a feedback path connected between the output terminal and the input terminal, the feedback path comprising:
i) a selectable impedance network comprising:
one or more resistive and/or reactive components; and
one or more stacked transistor switches operatively coupled to the one or more resistive and/or reactive components; and

ii) a capacitor in series connection with the selectable impedance network,

wherein:
the one or more stacked transistor switches are configured to select an impedance value of the selectable impedance network from a plurality of selectable impedance values in correspondence of a desired impedance value of the feedback path.

2. The RF amplifier arrangement of claim 1 wherein a stacked transistor switch of the one or more stacked transistor switches comprises a plurality of field effect transistors (FETs) operatively coupled in a stacked arrangement.

3. The RF amplifier arrangement of claim 2 wherein a FET of the plurality of FETs is an accumulated charge control (ACC) silicon on insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET).

4. The RF amplifier arrangement according to any one of claims 1 - 3 wherein a stacked transistor switch of the one or more stacked transistor switches is configured to set the impedance value to a first impedance value when in an OFF state and to a second impedance value different from the first impedance value when in an ON state.

5. The RF amplifier arrangement according to any one of claims 1 - 3 wherein a stacked transistor switch of the one or more stacked transistor switches is configured to stop a current flow through the feedback path when in one state and to allow the current flow through the feedback path when in an alternate state.

6. The RF amplifier arrangement according to any one of claims 1 - 3 wherein a stacked transistor switch of the one or more stacked transistor switches is operatively coupled in parallel to a resistive and/or reactive component of the one or more resistive and/or reactive components such as to include or exclude an effect of the resistive and/or reactive component from the feedback path.

7. The RF amplifier arrangement according to any one of claims 1 - 3 wherein the feedback path further comprises a plurality of parallel feedback paths between the output terminal and the input terminal of the amplifier, each feedback path of the plurality of feedback paths comprising one or more resistive and/or reactive components.

8. The RF amplifier arrangement of claim 7 wherein a stacked transistor switch of the one or more stacked transistor switches is configured to allow a current flow through a feedback path of the plurality of feedback paths when in one state and to stop the current flow through the feedback path when in an alternate state.

9. The RF amplifier arrangement according to any one of claims 1 - 3 wherein the RF amplifier comprises an arrangement of stacked transistors.

10. The RF amplifier arrangement according to claim 9 , wherein the arrangement of stacked transistors is configured as a cascode amplifier.

11. The RF amplifier arrangement according to any one of claims 1 - 3 wherein a reactive component of the one or more reactive components is a digitally tunable capacitor (DTC).

12. The RF amplifier arrangement according to any one of claims 1 - 3 wherein a reactive component of the one or more reactive components is a digitally tunable inductor (DTL).

13. The RF amplifier arrangement according to any one of claims 1 - 3 wherein the one or more stacked transistor switches are configured to select the impedance of the feedback path according to a desired frequency of operation of the RF amplifier arrangement.

14. The RF amplifier arrangement of claim 13 wherein the desired frequency of operation is in correspondence of a wideband frequency application.

15. The RF amplifier arrangement of claim 14 wherein the wideband frequency application comprises: a) 60 Ghz/5G Wi-Fi, b) GSM/EDGE/3G/4G, and c) Wi-Fi/BT/GPS/FM/Cellular.

16. A circuital arrangement comprising the RF amplifier arrangement according to any one of claims 1 - 3 .

17. The RF amplifier arrangement according to any one of claims 1 - 3 , the RF amplifier being monolithically integrated.

18. The RF amplifier arrangement of claim 17 , fabricated entirely or partially using one of: a) silicon on insulator (SOI) technology, and b) silicon on sapphire (SOS) technology.

19. A method for reducing the effect of a variable impedance in a feedback path of a radio frequency (RF) amplifier, the method comprising:
providing an RF amplifier with a characteristic output voltage range;
providing one or more resistive and/or reactive components;
providing one or more stacked transistor switches;
operatively connecting the one or more components and the one or more stacked transistor switches;
based on the connecting, obtaining a variable impedance with an impedance value of the variable impedance selectable via the one or more stacked transistor switches;
operatively coupling the variable impedance between an output terminal of the RF amplifier and an input terminal of the RF amplifier;
based on the coupling, creating a feedback path comprising the variable impedance and a series connected capacitor around the RF amplifier;
based on the creating, selecting the impedance value of the variable impedance based on a characteristics of an input RF signal;
based on the selecting, operating the RF amplifier in a feedback mode with the selected impedance value of the feedback path; and
based on the operating, maintaining the characteristic output voltage range of the RF amplifier.

20. The method of claim 19 wherein the stacked transistor switches comprise a plurality of field-effect transistors (FETs) and wherein a transistor of the plurality of FETs is an accumulated charge control (ACC) silicon on insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET).

21. The method of claim 20 wherein a characteristic response of the RF amplifier with the feedback path for a selected impedance value of the variable impedance is not limited by a characteristic of a stacked transistor switch of the one or more stacked transistor switches.

22. The method of claim 21 wherein the characteristic response of the RF amplifier with the feedback path comprises: a) a linear signal range, b) a linear performance, c) a distortion, and d) an output voltage range.

Assignees

• Peregrine Semiconductor Corp

Inventors

• Nobbe Dan William
• Lu Jianhua

Classifications

• H03F1/3205

  in field-effect transistor amplifiers · CPC title

• H03F3/195

  in integrated circuits · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F1/223 Primary

  with MOSFET's · CPC title

• H03F1/342

  in field-effect transistor amplifiers · CPC title