Photonic integrated circuit incorporating a bandgap temperature sensor

Patent metadata

Field	Value
Publication number	US-RE48654-E
Application number	US-201816211533-A
Country	US
Kind code	E1
Filing date	Dec 6, 2018
Priority date	Nov 5, 2014
Publication date	Jul 20, 2021
Grant date	Jul 20, 2021

Abstract

An optical device that includes means for thermal stabilization and control is described. The optical device can be a ring resonator, or another device that requires accurate control of the phase of the optical signal. In an example involving an optical resonator, a thermal stabilization system includes a temperature sensor, a control circuit, and a heater local to the resonator. The temperature sensor can be a bandgap temperature sensor formed of a pair of matched p/n junctions biased in operation at different junction currents.

First claim

What is claimed is:

1. A device comprising:
a semiconductor photonic integrated circuit (PIC) comprising:
at least one integrated optical device comprising an optical resonator;
a temperature sensor comprising first and second p/n junctions integrated with the optical resonator, wherein the first and second p/n junctions are operable configured to produce one or more electrical signals that are indicative of a temperature of the optical resonator; and
a temperature control element integrated with the optical resonator, the temperature control element operable configured to adjust the temperature of the optical resonator responsive to an electrical temperature control signal,; and
wherein the first and second p/n junctions are spaced from the temperature control element by at least 10 microns so as to lessen effects of local thermal gradients near the temperature control element on said p/n junctions
a substrate including a dielectric layer;
wherein the optical resonator comprises a patterned semiconductor layer disposed over the dielectric layer; and
wherein the first and second p/n junctions are planar p/n junctions each comprising a p-doped region of the patterned semicondutor layer abutting an n-doped region thereof.

2. The device of claim 1 wherein the first and second p/n junctions are disposed at least 10 microns away from the temperature control element at a device location wherein the local temperature is within 0.1 C of a local temperature at a location in the optical resonator that is farthest from the temperature control element over an operating temperature range specified for the PIC.

3. The device of claim 1 , wherein the optical resonator comprises a micro-ring resonator.

4. The device of claim 1 , wherein the optical resonator comprises a micro-disk resonator.

5. The device of claim 1 17, comprising a substrate including a dielectric layer, wherein:
the optical resonator comprises a patterned semiconductor layer disposed over the dielectric layer, and
the first and second p/n junctions are planar p/n junctions each comprising a p-doped region of the patterned semiconductor layer abutting an n-doped region thereof.

6. The device of claim 5 1, comprising a direct electrical connection between either the p-doped regions of the first and second p/n junctions or the n-doped region of the first and second p/n junctions.

7. The device of claim 5 1, wherein the first and second p/n junctions are configured to have matching current density vs. voltage characteristics.

8. The device of claim 5 1, wherein the optical resonator comprises at least one an optical waveguide in the patterned semiconductor layer, and wherein the first and second p/n junctions are integrated with the at least one optical waveguide.

9. The device of claim 5 1, wherein the first and second p/n junctions are spaced apart from the at least one integrated optical device.

10. The device of claim 2 1, wherein the temperature control element comprises a resistive heater integrated with the at least one integrated optical device.

11. The device of claim 10 , wherein the resistive heater comprises a metal element disposed over the at least one integrated optical device.

12. The device of claim 10 , wherein the at least one integrated optical device comprises at least one optical waveguide, and the resistive heater comprises a doped portion of the at least one optical waveguide that is configured to heat the at least one optical waveguide by passing electrical current therethrough.

13. The device of claim 1 , wherein the first p/n junction is matched in size with the second p/n junction.

14. The device of claim 1 wherein the at least one integrated optical device comprises an optical waveguide, further comprising a third p/n junction that is integrated with the optical waveguide and configured for modulating the refractive index of said optical waveguide.

15. The device of claim 2 1, further comprising a control circuit in electrical communication with each of the temperature sensor and the temperature control element, the control circuit configured to drive the temperature control element in dependence upon the one or more electrical signals obtained from the temperature sensor.

16. The device of claim 15 , wherein the control circuit includes a comparator comprising first and second input ports electrically coupled to the first and second p/n junctions and configured to produce a differential electrical signal proportional to a difference in voltages across the first and second p/n junctions.

17. A device comprising:
a semiconductor photonic integrated circuit (PIC) comprising: at least one integrated optical device comprising an optical resonator; a temperature sensor comprising first and second p/n junctions integrated with the optical resonator, wherein the first and second p/n junctions are operable to produce one or more electrical signals that are indicative of a temperature of the optical resonator; and a temperature control element integrated with the optical resonator, the temperature control element operable to adjust the temperature of the optical resonator responsive to an electrical temperature control signal; wherein at least one of the first and second p/n junctions comprises a plurality of interdigitated p and n regions.

18. The device of claim 1, further comprising a gap, absent of semiconductor material, extending down to the dielectric layer between the first and second p/n junctions.

19. The device of claim 1, further comprising a first electrical connection to the p-doped region, and a second electrical connection to the n-doped region;
wherein the first electrical connection comprises: a first conducting region in the patterned semiconductor region abutting the p-doped region, the first conducting region being more heavily p-doped than the p-doped region; and a first contact pad in ohmic contact with the first conducting region; and wherein the second electrical connection comprises: a second conducting region in the patterned semiconductor region abutting the n-doped region, the second conducting region being more heavily n-doped than the n-doped region; and a second contact pad in ohmic contact with the second conducting region.

20. The device of claim 8, wherein the p-doped region and the n-doped region meet in a middle portion of the optical waveguide.

21. The device of claim 8, wherein the p-doped region and the n-doped region meet at a non-zero angle to the optical waveguide.

Assignees

• Elenion Tech Llc
• Nokia Solutions & Networks Oy

Inventors

• Zhang Yi
• Yang Shuyu
• Padmaraju Kishore
• Hochberg Michael J

Classifications

• G02B6/29341 Primary

  Loop resonators operating in a whispering gallery mode evanescently coupled to a light guide, e.g. sphere or disk or cylinder (evanescent coupling for sensing fluorescence G01N21/648) · CPC title

• G02B6/29338

  Loop resonators · CPC title

• G02B6/12004

  Combinations of two or more optical elements · CPC title

• G02B6/134 Primary

  by substitution by dopant atoms · CPC title

• G02F2202/32

  Photonic crystals · CPC title