Semiconductor device including control signal generating circuit

Patent metadata

Field	Value
Publication number	US-9986172-B2
Application number	US-201715698531-A
Country	US
Kind code	B2
Filing date	Sep 7, 2017
Priority date	Aug 28, 2015
Publication date	May 29, 2018
Grant date	May 29, 2018

Abstract

A semiconductor device including a control signal generating circuit that outputs an exposure time switching pulse and a sweep period pulse, the exposure time switching pulse indicating a length of an exposure time in which light-receiving elements receive incident light, and the sweep period pulse specifying a time in which a ramp signal generating circuit sweeps a ramp signal; and a ramp waveform control circuit that stores a short-time exposure slope setting value and a long-time exposure slope setting value, switches between the short-time exposure slope setting value and the long-time exposure slope setting value according to the exposure time switching pulse, and outputs the switched one of the short-time exposure slope setting value and the long-time exposure slope setting value, the short-time exposure slope setting value setting a slope of the ramp signal used when the exposure time switching pulse indicates a short-time exposure period.

First claim

What is claimed is:

1. A semiconductor device comprising:
a control signal generating circuit that outputs an exposure time switching pulse and a sweep period pulse, the exposure time switching pulse indicating a length of an exposure time in which light-receiving elements receive incident light, and the sweep period pulse specifying a time in which a ramp signal generating circuit sweeps a ramp signal; and
a ramp waveform control circuit that stores a short-time exposure slope setting value and a long-time exposure slope setting value, switches between the short-time exposure slope setting value and the long-time exposure slope setting value according to the exposure time switching pulse, and outputs the switched one of the short-time exposure slope setting value and the long-time exposure slope setting value, the short-time exposure slope setting value setting a slope of the ramp signal used when the exposure time switching pulse indicates a short-time exposure period, and the long-time exposure slope setting value being a setting value for the slope of the ramp signal used when the exposure time switching pulse indicates a long-time exposure period, and the long-time exposure slope setting value indicating a slope different than that indicated by the short-time exposure slow setting value,
wherein
the control signal generating circuit sets a sweep time specified by the sweep period pulse output in a period indicated by the exposure time switching pulse as being the short-time exposure period such that it will be different than a sweep period specified by the sweep period pulse output in a period indicated by the exposure time switching pulse as being the long-time exposure period.

2. The semiconductor device according to claim 1 , further comprising:
a pixel area that accumulates charge according to an amount of the incident light and outputs pixel signals, wherein the light-receiving elements are arranged in the pixel area to receive the incident light; and
an analog-to-digital converter that reads the pixel signals and outputs digital values each according to a magnitude of a corresponding one of the pixel signals using the ramp signal.

3. The semiconductor device according to claim 2 , wherein the analog-to-digital converter generates a first digital value corresponding to the short-time exposure period and a second digital value corresponding to the long-time exposure period.

4. The semiconductor device according to claim 3 , wherein the analog-to-digital converter comprises a counter that counts reference clocks, stops a count operation of the counter in response to an inversion of a magnitude relation between a signal level of the ramp signal and a signal level of one of the pixel signals, and outputs a count value output by the counter as the digital value as of a time when the count operation is stopped.

5. The semiconductor device according to claim 3 , further comprising a data holding unit that holds the first digital value and the second digital value.

6. The semiconductor device according to claim 3 , further comprising a data operation unit that synthesizes the first digital value with the second digital value and outputs final image data.

7. The semiconductor device according to claim 6 , wherein the data operation unit replaces a part of the second digital value that corresponds to a large output code by the first digital value and outputs a resultant value.

8. The semiconductor device according to claim 6 , wherein the data operation unit replaces the second digital value having a magnitude greater than a switching point, by a value obtained by adding an offset value, to the first digital value, and outputs a resultant value.

9. The semiconductor device according to claim 8 ,
wherein the switching point and the offset value are previously calculated.

10. The semiconductor device according to claim 1 , further comprising an analog-to-digital converter for generating a digital value,
wherein, in response to a completion of the generation of the digital value corresponding to one of the short-time exposure period and the long-time exposure period, the analog-to-digital converter starts generating the digital value corresponding to another one of the short-time exposure period and the long-time exposure period.

11. The semiconductor device according to claim 1 , wherein
the ramp waveform control circuit includes two or more slope setting values indicating two or more different slopes as the short-time exposure slope setting value,
the ramp waveform control circuit includes two or more slope setting values indicating two or more different slopes as the long-time exposure slope setting value, and
an average slope value of a plurality of the slope setting values included in the long-time exposure slope setting value is smaller than an average slope value of a plurality of the slope setting values included in the short-time exposure slope setting value.

12. The semiconductor device according to claim 1 , further comprising:
an analog-to-digital converter which generates a first digital value corresponding to the short-time exposure period and a second digital value corresponding to the long-time exposure period; and
a ramp waveform generating circuit that outputs the ramp signal having a slope in accordance with the slope setting value output by the ramp waveform control circuit.

13. The semiconductor device according to claim 1 , wherein the control signal generating circuit sets a sweep time specified by the sweep period pulse output in a period indicated by the exposure time switching pulse as being the short-time exposure period such that it will be shorter than a sweep period specified by the sweep period pulse output in a period indicated by the exposure time switching pulse as being the long-time exposure period.

14. The semiconductor device according to claim 1 , wherein the long-time exposure slope setting value indicates a slope gentler than that indicated by the short-time exposure slope setting value.

15. A semiconductor device comprising:
a ramp signal generating circuit that switches a slope of a ramp signal according to a length of an exposure time in which light-receiving elements receive incident light,
the ramp signal generating circuit switches a slope of the ramp signal such that a number of bits in a digital value based on the received incident light output during a period when the exposure time has a first length becomes smaller than a number of bits in the digital value based on the received incident light output during a period when the exposure time has a second length different from the first length.

16. The semiconductor device according to claim 15 , further comprising:
a pixel area that accumulates charge according to an amount of the incident light and outputs pixel signals; and
an analog-to-digital converter that reads the pixel signals and outputs digital values each according to magnitude of a corresponding one of the pixel signals using the ramp signal,
wherein the analog-to-digital converter comprises a counter that counts reference clocks, stops a count operation of the counter in response to an inversion of a magnitude relation between a signal level of the ramp signal and a signal level of one of the pixel signals, and outputs a count value output by the counter as the digital value as of a time when the count operation is stopped.

17. The semiconductor device according to claim 15 , further comprising:
an analog-to-digital converter that reads the pixel signals and outputs digital values each according to magnit

Assignees

• Renesas Electronics Corp

Inventors

• Aibara Yasutoshi

Classifications

• H04N25/767

  Horizontal readout lines, multiplexers or registers · CPC title

• H04N25/583

  with different integration times · CPC title

• H04N23/745 Primary

  Detection of flicker frequency or suppression of flicker wherein the flicker is caused by illumination, e.g. due to fluorescent tube illumination or pulsed LED illumination · CPC title

• H04N25/589

  with different integration times, e.g. short and long exposures · CPC title

• H04N5/3742

  Electricity · mapped topic