Solid-state image sensing device with increased dynamic range

US9641779B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9641779-B2
Application numberUS-201414517807-A
CountryUS
Kind codeB2
Filing dateOct 18, 2014
Priority dateOct 18, 2013
Publication dateMay 2, 2017
Grant dateMay 2, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A CMOS image sensor used as a solid-state image sensing device includes a pixel circuit for outputting a voltage of a level corresponding to the illuminance, and an A/D converter for converting an output voltage of the pixel circuit into a digital signal. The resolution on the low illuminance side is higher than the resolution on the high illuminance side in the A/D converter. Thus, the dynamic range can be increased and the operation speed can be increased, compared to the case in which the resolution is constant independent of the illuminance.

First claim

Opening claim text (preview).

What is claimed is: 1. A solid-state image sensing device comprising: a pixel circuit for outputting a voltage of a level corresponding to the illuminance; and an A/D converter for converting an output voltage of the pixel circuit into a digital signal, wherein the resolution on a low illuminance side is higher than the resolution on a high illuminance side in the A/D converter, wherein the solid-state image sensing device further comprises: a ramp wave generation circuit for generating a ramp wave signal that varies in a range from a voltage corresponding to a minimum illuminance to a voltage corresponding to a maximum illuminance; and a reference voltage generation circuit for generating reference voltages of the ramp wave signal corresponding to illuminances of a plurality of levels from the minimum illuminance to the maximum illuminance, respectively, wherein the A/D converter includes: a comparator for comparing the voltage level between the output voltage of the pixel circuit and the voltage of the ramp wave signal; and a signal generation circuit for generating the digital signal based on a time from when the comparison is started by the comparator to when a comparison result of the comparator changes, wherein in the interval of the reference voltage on the low illuminance side is smaller than the interval of the reference voltage on the high illuminance side, and wherein the reference voltage generation circuit operates at a same clock frequency both on the low illuminance side and on the high illuminance side, therefore, a rate of change of the voltage per a predetermined time of the ramp wave signal on the low illuminance side is smaller than a rate of change of the voltage per the predetermined time of the ramp wave signal on the high illuminance side. 2. The solid-state image sensing device according to claim 1 , wherein the reference voltage generation circuit has a plurality of resistance elements that are coupled in series between a first voltage line and a second voltage line, wherein the reference voltage generation circuit includes a voltage divider for dividing the voltage between the first voltage and the second voltage, to generate the reference voltages of the levels. 3. The solid-state image sensing device according to claim 2 , wherein the solid-state image sensing device further comprises a control part for exposing the pixel circuit a plurality of times by changing the exposure time in one frame period, converting a plurality of output voltages of the pixel circuit into a plurality of digital signals by the A/D converter, and combining the digital signals together. 4. The solid-state image sensing device according to claim 2 , wherein the resistance values of the resistance elements are equal to each other, wherein the voltage divider includes a plurality of output terminals that are dispersedly disposed between the resistance elements, wherein the resistance value between the output terminals on the low illuminance side is smaller than the resistance value between the output terminals on the high illuminance side. 5. The solid-state image sensing device according to claim 2 , wherein each of the resistance elements includes one or more auxiliary resistance elements coupled in parallel, wherein the number of auxiliary resistance elements included in the resistance element on the low illuminance side is greater than the number of auxiliary resistance elements included in the resistance element on the high illuminance side. 6. The solid-state image sensing device according to claim 5 , wherein a resistance element of the resistance elements, which includes two or more auxiliary resistance elements, includes a switching circuit for changing the number of auxiliary resistance elements coupled in parallel. 7. The solid-stage image sensing device according to claim 1 , wherein the ramp wave generation circuit comprises: a counter including a plurality of frequency dividers coupled in series, for counting the number of pulses of a clock signal; a match detection circuit for increasing the rate of increase of the count value of the counter, in response to the matching of the count value of the counter with a predetermined value, wherein the respective reference voltages of the levels being assigned with the count value of the counter in advance; and a switching circuit for selecting any of the reference voltages of the levels based on the counter value of the counter, and outputting the selected reference voltage. 8. The solid-state image sensing device according to claim 1 , wherein the solid-state image sensing device further comprises a control part for exposing the pixel circuit a plurality of times by changing the exposure time in one frame period, converting a plurality of output voltages of the pixel circuit into a plurality of digital signals by the A/D converter, and combining the digital signals together.

Assignees

Inventors

Classifications

  • H04N25/50Primary

    Control of the SSIS exposure · CPC title

  • Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US9641779B2 cover?
A CMOS image sensor used as a solid-state image sensing device includes a pixel circuit for outputting a voltage of a level corresponding to the illuminance, and an A/D converter for converting an output voltage of the pixel circuit into a digital signal. The resolution on the low illuminance side is higher than the resolution on the high illuminance side in the A/D converter. Thus, the dynamic…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H04N25/50. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 02 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).