Integrated circuit package, method of fabricating the same, and wearable device including integrated circuit package

Patent metadata

Field	Value
Publication number	US-9978693-B2
Application number	US-201715604762-A
Country	US
Kind code	B2
Filing date	May 25, 2017
Priority date	Sep 23, 2016
Publication date	May 22, 2018
Grant date	May 22, 2018

Abstract

An integrated circuit package includes at least one first chip mounted in a first region of a mounting surface of a printed circuit board, a molding unit covering the mounting surface and surrounding the at least one first chip, an electromagnetic shielding film covering a surface of the molding unit and surrounding the at least one first chip, and a second chip mounted in a second region of the mounting surface. The second chip is exposed outside the electromagnetic shielding film and is spaced apart from the printed circuit board, with the molding unit being between the second chip and the printed circuit board.

First claim

What is claimed is:

1. An integrated circuit package, comprising:
a printed circuit board;
at least one first chip mounted over a first region of a mounting surface of the printed circuit board;
a molding unit covering the mounting surface and surrounding the at least one first chip;
an electromagnetic shielding film covering a surface of the molding unit and surrounding the at least one first chip; and
a second chip mounted over a second region of the mounting surface to be exposed outside the electromagnetic shielding film, the second chip being spaced apart from the printed circuit board, with the molding unit being between the second chip and the printed circuit board,
wherein the molding unit includes:
a chip protective molding unit covering the at least one first chip over the first region; and
a substrate protective molding unit having a lower thickness than the chip protective molding unit, the substrate protective molding unit extending between the printed circuit board and the second chip, and having a step and a recess surface on a top surface of the substrate protective molding unit, the recess surface being defined by the step.

2. The integrated circuit package as claimed in claim 1 , wherein:
the electromagnetic shielding film includes an opening exposing the recess surface to the outside of the electromagnetic shielding film, and
the second chip vertically overlaps the opening.

3. The integrated circuit package as claimed in claim 1 , wherein the chip protective molding unit and the substrate protective molding unit are connected to each other as one body.

4. The integrated circuit package as claimed in claim 1 , wherein:
the chip protective molding unit and the substrate protective molding unit are spaced apart from each other, with the electromagnetic shielding film being between the chip protective molding unit and the substrate protective molding unit, and
the electromagnetic shielding film is connected to a conductive pad in the printed circuit board between the chip protective molding unit and the substrate protective molding unit.

5. The integrated circuit package as claimed in claim 1 , wherein the second chip is connected to a conductive pad in the printed circuit board through a connection member penetrating the molding unit.

6. The integrated circuit package as claimed in claim 5 , wherein:
the connection member has a double-layer structure including a lower connection member and an upper connection member on the conductive pad in this order, and
the lower connection member and the upper connection member include a same material.

7. The integrated circuit package as claimed in claim 1 , wherein the second chip is spaced apart from the chip protective molding unit, with the electromagnetic shielding film being between the second chip and the chip protective molding unit.

8. The integrated circuit package as claimed in claim 1 , wherein the electromagnetic shielding film includes:
a first shielding portion conformally covering the chip protective molding unit; and
a second shielding portion covering the top surface of the substrate protective molding unit around the second chip, and
wherein a height of a top surface of the second shielding portion is less than a height of a top surface of the second chip.

9. The integrated circuit package as claimed in claim 1 , wherein the second chip includes a biosignal sensing sensor.

10. The integrated circuit package as claimed in claim 1 , wherein the first region has a shape surrounding at least a portion of the second region.

11. An integrated circuit package, comprising:
a printed circuit board including a mounting surface and a plurality of conductive pads exposed in the mounting surface, the mounting surface having a first region and a second region adjacent to the first region;
at least one first chip mounted over the first region;
a molding unit including
a chip protective molding unit, which covers the at least one first chip over the first region, and
a substrate protective molding unit having a lower thickness than the chip protective molding unit, the substrate protective molding unit extending on the second region and having a step and a recess surface on a top surface of the substrate protective molding unit, the recess surface being defined by the step;
an electromagnetic shielding film extending to cover the molding unit on the first region and the second region, and having an opening that exposes the recess surface over the second region; and
a second chip connected to at least one conductive pad selected from among the plurality of conductive pads through a connection member penetrating the substrate protective molding unit on the second region, wherein the second chip is at least partially exposed outside the electromagnetic shielding film by the opening.

12. The integrated circuit package as claimed in claim 11 , wherein the step of the substrate protective molding unit is aligned with an inner sidewall of the opening of the electromagnetic shielding film such that the step has a surface consecutively connected to a vertical extension line of the inner sidewall of the opening.

13. The integrated circuit package as claimed in claim 11 , wherein a planar shape of the opening of the substrate protective molding unit is the same as a planar shape of the recess surface.

14. The integrated circuit package as claimed in claim 11 , wherein the substrate protective molding unit includes:
an edge portion surrounding the recess surface and having a top surface covered with the electromagnetic shielding film; and
a central portion surrounded by the edge portion and having the recess surface, wherein
the edge portion has a first thickness that is less than a thickness of the chip protective molding unit, and
the central portion has a second thickness that is less than the first thickness.

15. The integrated circuit package as claimed in claim 11 , wherein the first region has a ring-like planar shape surrounding the second region.

16. The integrated circuit package as claimed in claim 11 , wherein the chip protective molding unit and the substrate protective molding unit are connected to each other as one body.

17. An integrated circuit package, comprising:
a printed circuit board including a mounting surface and a plurality of conductive pads exposed in the mounting surface, the mounting surface having a first region and a second region adjacent to the first region;
at least one first chip mounted over the first region;
a second chip mounted over the second region;
a molding unit including
a chip protective molding unit, which covers the at least one first chip over the first region, and
a substrate protective molding unit having a lower thickness than the chip protective molding unit, the substrate protective molding unit extending on the second region;
an electromagnetic shielding film extending to cover the molding unit on the first region and portions of the second region adjacent the first region, and having an opening that exposes the substrate protective molding unit facing the second chip; and
at least one conductive pad selected from among the plurality of conductive pads connected to the second chip through a connection member penetrating the substrate protective molding unit on the second region, wherein the second chip extends further above the mounting surface than the electromagnetic shielding film.

18. The integrated circuit package as claimed in claim 17 , wherein the second chip and the electromagnetic shielding film onl

Assignees

• Samsung Electronics Co Ltd

Inventors

• Jeong Chan-Hee
• Park Soo-Jae
• Kim Young-Hoon
• Kang In-Ku
• Kim Hee-Yeol

Classifications

• H10W42/273

  the arrangements being between laterally adjacent chips, e.g. walls between chips · CPC title

• H10W42/276

  the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W74/10

  characterised by their shape or disposition · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title