Dual lead frame semiconductor package and method of manufacture
US-9595503-B2 · Mar 14, 2017 · US
US9966330B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9966330-B2 |
| Application number | US-201313829623-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 14, 2013 |
| Priority date | Mar 14, 2013 |
| Publication date | May 8, 2018 |
| Grant date | May 8, 2018 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
In one embodiment, a stack die package can include a lead frame and a first die including a gate and a source that are located on a first surface of the first die and a drain that is located on a second surface of the first die that is opposite the first surface. The gate and source are flip chip coupled to the lead frame. The stack die package can include a second die including a gate and a drain that are located on a first surface of the second die and a source that is located on a second surface of the second die that is opposite the first surface. The source of the second die is facing the drain of the first die.
Opening claim text (preview).
What is claimed is: 1. A stack die package comprising: a lead frame; a first die comprising a gate and a source that are located on a first surface of said first die and a drain that is located on a second surface of said first die that is opposite said first surface, said gate and source are flip chip coupled to said lead frame, said first die comprising split gate technology; a second die comprising a gate and a drain that are located on a first surface of said second die and a source that is located on a second surface of said second die that is opposite said first surface, said source of said second die is facing said drain of said first die; a clip coupled to said lead frame and said drain of said second die; and a molding material covering said first die, second die, and clip while a portion of an upper surface of said clip is free of said molding material, said portion of said upper surface of said clip is free of plating material and is exposed in final package. 2. The stack die package of claim 1 , further comprising: a second clip coupled to said lead frame and said source of said second die. 3. The stack die package of claim 1 , further comprising: a second clip coupled to said lead frame and said drain of said first die. 4. The stack die package of claim 1 , further comprising: a second clip coupled to said lead frame and said gate of said second die. 5. The stack die package of claim 4 , further comprising: a third clip coupled to said lead frame, said drain of said first die, and said source of said second die. 6. The stack die package of claim 4 , further comprising: a third clip coupled to said lead frame and said source of said second die. 7. The stack die package of claim 4 , further comprising: a third clip coupled to said lead frame and said drain of said first die. 8. A stack die package comprising: a lead frame; a first die comprising a gate and a source that are located on a first surface of said first die and a drain that is located on a second surface of said first die that is opposite said first surface, said gate and source are flip chip coupled to said lead frame, said first die comprising split gate technology; a second die comprising a gate and a source that are located on a first surface of said second die and a drain that is located on a second surface of said second die that is opposite said first surface, said source of said second die is facing said drain of said first die; a clip coupled to said lead frame and said drain of said second die; and a molding material covering said first die, second die, and clip while a portion of an upper surface of said clip is free of said molding material, said portion of said upper surface of said clip is free of plating material and is exposed in final package. 9. The stack die package of claim 8 , further comprising: a second clip coupled to said lead frame and said source of said second die. 10. The stack die package of claim 8 , further comprising: a second clip coupled to said lead frame and said drain of said first die. 11. The stack die package of claim 8 , further comprising: a second clip coupled to said lead frame and said gate of said second die. 12. The stack die package of claim 11 , further comprising: a third clip coupled to said lead frame, said drain of said first die, and said source of said second die. 13. The stack die package of claim 11 , further comprising: a third clip coupled to said lead frame and said source of said second die. 14. The stack die package of claim 11 , further comprising: a third clip coupled to said lead frame and said drain of said first die. 15. A stack die package comprising: a lead frame; a first die comprising a gate and a source that are located on a first surface of said first die and a drain that is located on a second surface of said first die that is opposite said first surface, said gate and source are flip chip coupled to said lead frame, said first die comprising split gate technology; a second die comprising a gate and a drain that are located on a first surface of said second die and a source that is located on a second surface of said second die that is opposite said first surface, said source of said second die is facing said drain of said first die, said second die comprising Laterally Diffused Metal Oxide Semiconductor (LDMOS) technology; a clip coupled to said lead frame and said drain of said second die; and a molding material covering said first die, second die, and clip while a portion of an upper surface of said clip is free of said molding material, said portion of said upper surface of said clip is free of plating material and is exposed in final package. 16. The stack die package of claim 15 , further comprising: a second clip coupled to said lead frame and said source of said second die. 17. The stack die package of claim 15 , further comprising: a second clip coupled to said lead frame and said drain of said first die. 18. The stack die package of claim 15 , further comprising: a second clip coupled to said lead frame and said gate of said second die. 19. The stack die package of claim 18 , further comprising: a third clip coupled to said lead frame, said drain of said first die, and said source of said second die. 20. The stack die package of claim 18 , further comprising: a third clip coupled to said lead frame and said source of said second die.
changes in shapes · CPC title
between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title
Encapsulations, e.g. protective coatings · CPC title
Die-attach connectors and bond wires · CPC title
multiple bond wires connected to common bond pads at both ends of the wires · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.