Shape based grouping

Patent metadata

Field	Value
Publication number	US-9965848-B2
Application number	US-201615355606-A
Country	US
Kind code	B2
Filing date	Nov 18, 2016
Priority date	Dec 23, 2015
Publication date	May 8, 2018
Grant date	May 8, 2018

Abstract

Shape primitives are used for inspection of a semiconductor wafer or other workpiece. The shape primitives can define local topological and geometric properties of a design. One or more rules are applied to the shape primitives. The rules can indicate presence of a defect or the likelihood of a defect being present. A rule execution engine can search for an occurrence of the shape primitives covered by the at least one rule.

First claim

What is claimed is:

1. A system comprising:
a review tool, wherein the review tool includes:
a stage configured to hold a wafer; and
an image generation system configured to generate an image of the wafer; and

a controller in electronic communication with the review tool, wherein the controller is configured to:
request design polygons in a field of view centered at one or more defect locations of the wafer;
render a binary image showing the design polygons in the field of view;
extract shape primitives that define local topological and geometric properties of a design; and
apply at least one rule to the shape primitives using a rule execution engine, wherein the rule execution engine searches for an occurrence of the shape primitives covered by the at least one rule, and wherein the rule corresponds to presence of a defect.

2. The system of claim 1 , wherein the controller includes a processor and a communication port in electronic communication with the processor and the electronic data storage unit.

3. The system of claim 1 , wherein the review tool is a broad band plasma tool.

4. The system of claim 1 , wherein the image generation system is configured to use at least one of an electron beam, a broad band plasma, or a laser to generate the image of the wafer.

5. The system of claim 1 , wherein the controller is further configured to generate shape-based grouping bins with the rule execution engine.

6. The system of claim 1 , the rule applies to the shape primitives on multiple layers of the wafer.

7. The system of claim 1 , wherein the rule is applied in a rule interaction window.

8. The system of claim 1 , wherein the controller is further configured to infer one or more additional rules for a population of the defect locations.

9. A method comprising:
requesting, using a controller, design polygons in a field of view centered at one or more defect locations of a wafer;
rendering, using the controller, a binary image showing the design polygons in the field of view;
extracting, using the controller, shape primitives that define local topological and geometric properties of a design; and
applying at least one rule to the shape primitives using a rule execution engine, wherein the rule execution engine searches for an occurrence of the shape primitives covered by the at least one rule, and wherein the rule corresponds to presence of a defect.

10. The method of claim 9 , further comprising generating, using the controller, shape-based grouping bins with the rule execution engine.

11. The method of claim 9 , wherein the rule applies to the shape primitives on multiple layers of the wafer.

12. The method of claim 9 , wherein the rule is applied in a rule interaction window.

13. The method of claim 9 , further comprising inferring one or more additional rules for a population of the defect locations.

14. The method of claim 9 , further comprising:
loading the wafer onto a stage of a review tool; and
imaging the wafer on the stage.

15. The method of claim 9 , further comprising:
determining at least one location of the occurrence of the shape primitives covered by the at least one rule;
converting the at least one location to a map that is configured to assign a sensitivity to different regions based on the rule and criticality; and
binning the defect at the at least one location.

16. A non-transitory computer-readable storage medium, comprising one or more programs for executing the following steps on one or more computing devices:
requesting design polygons in a field of view centered at one or more defect locations of a wafer;
rendering a binary image showing the design polygons in the field of view;
extracting shape primitives that define local topological and geometric properties of a design; and
applying at least one rule to the shape primitives using a rule execution engine, wherein the rule execution engine searches for an occurrence of the shape primitives covered by the at least one rule, and wherein the rule corresponds to presence of a defect.

17. The non-transitory computer-readable storage medium of claim 16 , wherein the steps further comprise generating shape-based grouping bins with the rule execution engine.

18. The non-transitory computer-readable storage medium of claim 16 , wherein the rule applies to the shape primitives on multiple layers of the wafer.

19. The non-transitory computer-readable storage medium of claim 16 , wherein the steps further comprise inferring one or more additional rules for a population of the defect locations.

20. The non-transitory computer readable storage medium of claim 16 , wherein the steps further comprise:
determining at least one location of the occurrence of the shape primitives covered by the at least one rule;
converting the at least one location to a map that is configured to assign a sensitivity to different regions based on the rule and criticality; and
binning the defect at the at least one location.

Assignees

• Kla Tencor Corp

Inventors

• Banerjee Saibal
• Kulkarni Ashok
• Saraswatula Jagdish
• Bhattacharyya Santosh

Classifications

• G06T2207/10061

  from scanning electron microscope · CPC title

• G06T7/0006 Primary

  using a design-rule based approach · CPC title

• G06T2207/30148

  Semiconductor; IC; Wafer · CPC title

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P74/207

  Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title