Wiring substrate

US9961760B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9961760-B2
Application numberUS-201715489876-A
CountryUS
Kind codeB2
Filing dateApr 18, 2017
Priority dateJun 13, 2016
Publication dateMay 1, 2018
Grant dateMay 1, 2018

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.

First claim

Opening claim text (preview).

What is claimed is: 1. A wiring substrate, comprising: an insulating layer including a projection; and a wiring layer on the projection, the wiring layer including a first metal layer on an end face of the projection; and a second metal layer on the first metal layer, wherein a width of the end face of the projection is smaller than a width of the first metal layer and a width of the second metal layer, and an inner wall surface and a bottom surface of a depression around the projection are roughened surfaces. 2. The wiring substrate as claimed in claim 1 , wherein a roughness of the end face of the projection in contact with the first metal layer is smaller than a roughness of the inner wall surface and the bottom surface of the depression. 3. The wiring substrate as claimed in claim 1 , further comprising: another insulating layer on the insulating layer, the another insulating layer including a photosensitive resin as a principal component, the another insulating layer covering the wiring layer, and the inner wall surface and the bottom surface of the depression. 4. The wiring substrate as claimed in claim 1 , wherein the insulating layer is formed of an insulating resin, the insulating resin being formed of an organic compound including elements of silicon (Si), carbon (C), hydrogen (H), and oxygen (O), and a protrusion whose principal component is a silicon oxide is formed in the inner wall surface and the bottom surface of the depression that are the roughened surfaces. 5. A wiring substrate, comprising: an insulating layer including a projection; and a wiring layer on the projection, the wiring layer including a first metal layer on an end face of the projection; and a second metal layer on the first metal layer, wherein a width of the end face of the projection is different from at least one of a width of the first metal layer and a width of the second metal layer, an inner wall surface and a bottom surface of a depression around the projection are roughened surfaces, the width of the first metal layer is smaller than the width of the second metal layer, and the second metal layer includes a surface in contact with the first metal layer, and a peripheral portion of the surface of the second metal layer is exposed outside the first metal layer. 6. The wiring substrate as claimed in claim 5 , wherein a roughness of the end face of the projection in contact with the first metal layer is smaller than a roughness of the inner wall surface and the bottom surface of the depression. 7. The wiring substrate as claimed in claim 5 , wherein the width of the first metal layer is smaller than the width of the end face of the projection, and a peripheral portion of the end face of the projection is exposed outside the first metal layer. 8. The wiring substrate as claimed in claim 5 , further comprising: another insulating layer on the insulating layer, the another insulating layer including a photosensitive resin as a principal component, the another insulating layer covering the wiring layer, and the inner wall surface and the bottom surface of the depression. 9. The wiring substrate as claimed in claim 5 , wherein the insulating layer is formed of an insulating resin, the insulating resin being formed of an organic compound including elements of silicon (Si), carbon (C), hydrogen (H), and oxygen (O), and a protrusion whose principal component is a silicon oxide is formed in the inner wall surface and the bottom surface of the depression that are the roughened surfaces.

Assignees

Inventors

Classifications

  • Through-vias · CPC title

  • of vias therein · CPC title

  • comprising multiple insulating layers · CPC title

  • Insulating materials thereof · CPC title

  • Shapes or dispositions of interconnections · CPC title

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Frequently asked questions

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What does patent US9961760B2 cover?
A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An i…
Who is the assignee on this patent?
Shinko Electric Ind Co
What technology area does this patent fall under?
Primary CPC classification H10W70/05. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).