Printed wiring board and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9711439-B2
Application number	US-201514841923-A
Country	US
Kind code	B2
Filing date	Sep 1, 2015
Priority date	Sep 1, 2014
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

A printed wiring board includes an insulating layer including insulating material, and a conductor layer formed on a surface of the insulating layer and including conductor pads and conductor patterns such that the conductor pads are positioned to connect one or more electronic components and that the conductor patterns are formed between the conductor pads. The conductor patterns are formed such that each conductor pattern has a pattern width of 3 μm or less and that the conductor patterns have a pattern interval of 3 μm or less between adjacent conductor patterns, and the insulating layer has recess portions formed on the surface between the conductor patterns at least along the conductor patterns such that the recess portions have a depth in a range of 0.1 μm to 2.0 μm relative to a contact interface at which the conductor patterns and the insulating layer are in contact with each other.

First claim

What is claimed is:

1. A printed wiring board, comprising:
an insulating layer comprising an insulating material; and
a conductor layer formed on a surface of the insulating layer and comprising a plurality of conductor pads and a plurality of conductor patterns such that the plurality of conductor pads is positioned to connect at least one electronic component and that the plurality of conductor patterns is formed between the conductor pads,
wherein the plurality of conductor patterns is formed such that each of the conductor patterns has a pattern width of 3 μm or less and that the conductor patterns have a pattern interval of 3 μm or less between adjacent conductor patterns, and the insulating layer has a plurality of recess portions formed on the surface between the conductor patterns at least along the conductor patterns such that the plurality of recess portions has a depth in a range of 0.1 μm to 2.0 μm relative to a contact interface at which the conductor patterns and the insulating layer are in contact with each other.

2. A printed wiring board according to claim 1 , wherein the insulating layer is formed such that the surface of the insulating layer is recessed in a depth in a range of 0.1 μm to 2.0 μm except portions forming the contact interface at which the conductor patterns and the insulating layer are in contact with each other.

3. A printed wiring board according to claim 2 , wherein the plurality of recess portions is formed between the conductor patterns such that each of the recess portions has a width which is greater than the pattern interval of the conductor patterns with respect to a width direction of the conductive patterns.

4. A printed wiring board according to claim 2 , wherein the insulating material of the insulating layer comprises a photosensitive resin.

5. A printed wiring board according to claim 2 , wherein the insulating material of the insulating layer has a water absorption rate of 1.0% by mass or less.

6. A printed wiring board according to claim 1 , wherein the plurality of recess portions is formed between the conductor patterns such that each of the recess portions has a width which is greater than the pattern interval of the conductor patterns with respect to a width direction of the conductive patterns.

7. A printed wiring board according to claim 1 , wherein the insulating material of the insulating layer comprises a photosensitive resin.

8. A printed wiring board according to claim 1 , wherein the insulating material of the insulating layer has a water absorption rate of 1.0% by mass or less.

9. A printed wiring board according to claim 1 , wherein the insulating material of the insulating layer comprises nano-filler.

10. A printed wiring board according to claim 1 , further comprising:
an insulating material layer having a water absorption rate of 1.0% by mass or less and laminated on the conductor layer such that the insulating material layer is filling spaces between the conductor patterns.

11. A printed wiring board according to claim 1 , wherein the conductor layer is an outermost conductor layer formed in a laminated structure comprising a plurality of insulating layers and a plurality of conductor layers formed on the plurality of insulating layers, respectively, and each of the conductor layers includes a plurality of conductor pads and a plurality of conductor patterns.

12. A printed wiring board according to claim 11 , wherein the plurality of conductor pads and the plurality of conductor patterns have upper surfaces on a same plane.

13. A printed wiring board according to claim 1 , further comprising:
a main wiring board comprising a plurality of main conductor patterns configured to connect a plurality of electronic components,
wherein the insulating layer and the conductor layer are formed such that a sub wiring board comprising the insulating layer and the conductor layer is formed on the main wiring board and that the pattern width and pattern interval of the conductor patterns are narrower than a pattern width and a pattern interval of the main conductor patterns, respectively, and the plurality of conductor patterns is configured to connect the plurality of electronic components on the main wiring board.

14. A printed wiring board according to claim 13 , wherein the sub wiring board is embedded inside the main wiring board.

15. A printed wiring board according to claim 13 , wherein the sub wiring board is mounted to the main wiring board such that the sub wiring board is exposed from the main wiring board.

16. A printed wiring board according to claim 15 , wherein the sub wiring board comprises an outermost insulating layer and a plurality of outermost conductor pads formed in the outermost insulating layer such that the outermost conductor pads have surfaces exposed on a surface of the outermost insulating layer on a same plane with respect to the surface of the outermost insulating layer.

17. A printed wiring board according to claim 1 , wherein the insulating material of the insulating layer comprises filler.

Assignees

• Ibiden Co Ltd

Inventors

• Sakamoto Hajime
• Takahashi Nobuya

Classifications

• H10W70/618

  the bridge chips being embedded in the package substrates, interposers or redistribution layers · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W70/63

  Vias, e.g. via plugs · CPC title

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W90/00

  Package configurations · CPC title