Manufacturing method of power storage device

US9960225B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9960225-B2
Application numberUS-201113164839-A
CountryUS
Kind codeB2
Filing dateJun 21, 2011
Priority dateJun 30, 2010
Publication dateMay 1, 2018
Grant dateMay 1, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

It is an object to improve performance of a power storage device, such as cycle characteristics. A power storage device includes a current collector and a crystalline semiconductor layer including a whisker, which is formed on and in close contact with the current collector. Separation of the crystalline semiconductor layer is suppressed by an increase of adhesion, whereby cycle characteristics in which a specific capacity of a tenth cycle number with respect to a first cycle number is greater than or equal to 90% is realized. In addition, cycle characteristics in which a specific capacity of a hundredth cycle number with respect to a first cycle number is greater than or equal to 70% is realized.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing a power storage device comprising the steps of: performing a surface treatment on a current collector; and forming a crystalline semiconductor layer including a whisker over the current collector, wherein the crystalline semiconductor layer comprises silicon, wherein a diameter of the whisker is greater than or equal to 500 nm and less than or equal to 3 μm, wherein a length along an axis of the whisker is greater than or equal to 500 nm and less than or equal to 1000 μm, wherein the current collector comprises a metal element which forms silicide by reacting with silicon on a surface region of the current collector, and wherein the surface treatment is performed on the current collector by using a material selected from the group consisting of a hydrofluoric acid, NF 3 plasma, SiF 4 plasma, and ClF 3 plasma. 2. A method for manufacturing a power storage device according to claim 1 , wherein the surface treatment is performed on the current collector by using the material selected from the group consisting of a hydrofluoric acid, NF 3 plasma, SiF 4 plasma, and ClF 3 plasma and then processed with running water. 3. A method for manufacturing a power storage device comprising the steps of: processing a current collector with a material selected from the group consisting of a hydrofluoric acid, NF 3 plasma, SiF 4 plasma, and ClF 3 plasma; and forming a crystalline semiconductor layer including a whisker over the current collector, wherein the crystalline semiconductor layer comprises silicon, wherein a diameter of the whisker is greater than or equal to 500 nm and less than or equal to 3 μm, wherein a length along an axis of the whisker is greater than or equal to 500 nm and less than or equal to 1000 μm, and wherein the current collector comprises a metal element which forms silicide by reacting with silicon on a surface region of the current collector. 4. A method for manufacturing a power storage device according to claim 3 , wherein the current collector is processed with the material selected from the group consisting of a hydrofluoric acid, NF 3 plasma, SiF 4 plasma, and ClF 3 plasma and then processed with running water. 5. A method for manufacturing a power storage device comprising the steps of: processing a current collector with a material selected from the group consisting of a hydrofluoric acid, NF 3 plasma, SiF 4 plasma, and ClF 3 plasma; and forming a crystalline semiconductor layer including a whisker over the current collector with a source gas containing silicon by a low-pressure chemical vapor deposition method, wherein the crystalline semiconductor layer comprises silicon, wherein a diameter of the whisker is greater than or equal to 500 nm and less than or equal to 3 μm, wherein a length along an axis of the whisker is greater than or equal to 500 nm and less than or equal to 1000 μm, and wherein the current collector comprises a metal element which forms silicide by reacting with silicon on a surface region of the current collector. 6. A method for manufacturing a power storage device according to claim 5 , wherein the current collector is processed with the material selected from the group consisting of a hydrofluoric acid, NF 3 plasma, SiF 4 plasma, and ClF 3 plasma and then processed with running water. 7. A method for manufacturing a power storage device according to claim 1 , wherein a transverse cross-sectional shape of the whisker is circular. 8. A method for manufacturing a power storage device according to claim 5 , wherein a transverse cross-sectional shape of the whisker is circular. 9. A method for manufacturing a power storage device according to claim 1 , wherein the metal element is at least any one of titanium and nickel. 10. A method for manufacturing a power storage device according to claim 5 , wherein the metal element is at least any one of titanium and nickel.

Assignees

Inventors

Classifications

  • Energy storage using capacitors · CPC title

  • specially adapted for electrodes (carbonisation or activation of carbon for the manufacture of electrodes H01G11/34) · CPC title

  • Stacked hybrid or EDL capacitors · CPC title

  • arranged or disposed on a current collector; Layers or phases between electrodes and current collectors, e.g. adhesives · CPC title

  • Electrodes based on metals, Si or alloys · CPC title

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Frequently asked questions

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What does patent US9960225B2 cover?
It is an object to improve performance of a power storage device, such as cycle characteristics. A power storage device includes a current collector and a crystalline semiconductor layer including a whisker, which is formed on and in close contact with the current collector. Separation of the crystalline semiconductor layer is suppressed by an increase of adhesion, whereby cycle characteristics…
Who is the assignee on this patent?
Kuriki Kazutaka, Konishi Michiko, Tadokoro Asami, and 4 more
What technology area does this patent fall under?
Primary CPC classification H01L28/84. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).