Controlled solder height packages and assembly processes

US9960105B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9960105-B2
Application numberUS-201213631939-A
CountryUS
Kind codeB2
Filing dateSep 29, 2012
Priority dateSep 29, 2012
Publication dateMay 1, 2018
Grant dateMay 1, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An apparatus comprises a substrate including a surface and a plurality of bonding pads positioned on the surface. The apparatus also includes a material comprising a solder positioned on the bonding pads and extending a distance outward therefrom. A first of the bonding pads in a first location on the substrate surface includes the solder extending a first distance outward therefrom. A second of the bonding pads in a second location on the substrate surface includes the solder extending a second distance outward therefrom. The first distance is different than the second distance. Other embodiments are described and claimed.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a substrate comprising a first substrate surface and a second substrate surface opposite the first substrate surface, the first substrate surface including a first bonding pad and a second bonding pad thereon, the first bonding pad positioned in a first location on an outer portion of the first substrate surface, the second bonding pad positioned on a central portion of the first substrate surface, the first bonding pad and the second bonding pad positioned to extend an equal distance outward from the first substrate surface, and a semiconductor die positioned on the second substrate surface; a solder resist positioned between the first bonding pad and the second bonding pad on the first substrate surface, wherein the solder resist layer extends from a side surface of the first bonding pad to a side surface of the second bonding pad, wherein the solder resist layer is in contact with the side surface of the first bonding pad and the side surface of the second bonding pad, the solder resist positioned to extend an equal distance outward from the first substrate surface to that of the first bonding pad and the second bonding pad at the side surface of the first bonding pad and at the side surface of the second bonding pad; a first amount of solder positioned on the first bonding pad; a second amount of solder positioned on the second bonding pad, wherein the first amount of solder is equal to the second amount of solder; the first bonding pad having a smaller area on which the solder is positioned than the second bonding pad; the solder on the first bonding pad extending a first distance outward therefrom; and the solder on the second bonding pad extending a second distance outward therefrom, wherein the first distance is greater than the second distance. 2. The apparatus of claim 1 , further comprising additional bonding pads positioned on the first substrate surface. 3. A method comprising: providing a substrate comprising a first substrate surface and a second substrate surface opposite the first substrate surface, the first substrate surface including a plurality of bonding pads thereon, second substrate surface including a semiconductor die positioned thereon, the first substrate surface including a first bonding pad on an outer portion of the first substrate surface and a second bonding pad on a central portion of the first substrate surface, the first bonding pad having a smaller solder contact area than the second bonding pad, wherein the providing the first substrate surface including the plurality of bonding pads includes forming a solder resist layer, forming openings in the solder resist layer, and after the forming the openings in the solder resist layer, depositing a material comprising a metal in the openings to form the first bonding pad and the second bonding pad, the first bonding pad formed in a first opening, the second bonding pad formed in a second opening, wherein the first opening is smaller than the second opening, wherein the solder resist layer extends from a side surface of the first bonding pad to a side surface of the second bonding pad, wherein the solder resist layer is in contact with the side surface of the first bonding pad and the side surface of the second bonding pad, and wherein the solder resist layer is positioned to extend an equal distance outward from the first substrate surface to that of the first bonding pad and the second bonding pad at the side surface of the first bonding pad and at the side surface of the second bonding pad; forming a first volume of solder on the solder contact area of the first bonding pad, so that the first volume of solder extends outward from the first bonding pad a first distance; and forming a second volume of solder on the solder contact area of the second bonding pad, so that the second volume of solder extends outward from the second bonding pad a second distance that is less than the first distance; wherein the first volume is equal to the second volume. 4. The method of claim 3 , wherein the forming the first volume and the forming the second volume comprises providing an amount of solder on the first bonding pad and an amount of solder on the second bonding pad and providing heat to form a reflowed solder region on the first bonding pad and a reflowed solder region on the second bonding pad. 5. The method of claim 4 , further comprising, after the forming the first volume and the second volume, aligning the substrate with a printed circuit board and performing an additional heating to form a solder joint between the substrate and the printed circuit board through the first volume and the second volume. 6. The method of claim 3 , wherein the forming the first volume and the forming the second volume comprises: positioning a first solder ball on the first bonding pad and a second solder ball on the second bonding pad; and heating the first solder ball and the second solder ball to a reflow temperature to form a reflowed solder region on the first bonding pad and a reflowed solder region on the second bonding pad. 7. The method of claim 6 , further comprising, after the forming the first volume and the second volume, aligning the substrate with a printed circuit board and performing an additional heating to form a solder joint between the substrate and the printed circuit board through the first volume and the second volume. 8. The method of claim 3 , further comprising forming additional openings in the solder resist layer between the first opening and the second opening, and forming additional bonding pads in the additional openings. 9. The method of claim 3 , further comprising forming the solder resist to extend a distance outward from the first substrate surface, and forming the first bonding pad and the second bonding pad to extend an equal distance outward from the first substrate surface to that of the solder resist. 10. The method of claim 3 , further comprising forming the first bonding pad and the second bonding pad to have a thickness equal to that of the solder resist. 11. A method comprising: providing a substrate including a first side and a second side opposite the first side, the first side including a die positioned thereon, the second side including a first bonding pad and a second bonding pad and a solder resist layer extending from the first bonding pad to the second bonding pad, the solder resist layer positioned to extend an equal distance outward from the second side to that of the first bonding pad and the second bonding pad, wherein the first bonding pad has a size equal to that of the second bonding pad; positioning equal amounts of solder on the first bonding pad and on the second bonding pad; heating the equal amounts of solder to a reflow temperature to form a reflowed solder region on the first bonding pad and a reflowed solder region on the second bonding pad; positioning additional solder on the reflowed solder region on the first bonding pad and on the reflowed solder region on the second bonding pad, wherein a different quantity of the additional solder is positioned on the reflowed solder region on the first bonding pad than is positioned on the reflowed solder region on the second bonding pad; heating the additional solder and the reflowed solder region on the first bonding pad, and the additional solder and the reflowed solder region on the second bonding pad, to a reflow temperature to form a first volume of solder on the first bonding pad and a second volume of solder on the second bonding pad, wherein the first volume is different than the second volume; and after the positioning the additional solder on the reflowed solder regio

Assignees

Inventors

Classifications

  • Multiple bump connectors having different shapes · CPC title

  • Multiple bumps having different sizes · CPC title

  • Interconnections or connectors in packages · CPC title

  • H10W70/093Primary

    Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

  • H10W90/701Primary

    characterised by the relative positions of pads or connectors relative to package parts · CPC title

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Frequently asked questions

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What does patent US9960105B2 cover?
An apparatus comprises a substrate including a surface and a plurality of bonding pads positioned on the surface. The apparatus also includes a material comprising a solder positioned on the bonding pads and extending a distance outward therefrom. A first of the bonding pads in a first location on the substrate surface includes the solder extending a first distance outward therefrom. A second o…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/093. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).