Method for bonding and interconnecting integrated circuit devices

Patent metadata

Field	Value
Publication number	US-9960080-B2
Application number	US-201615199147-A
Country	US
Kind code	B2
Filing date	Jun 30, 2016
Priority date	Jul 1, 2015
Publication date	May 1, 2018
Grant date	May 1, 2018

Abstract

A method for bonding and interconnecting two or more IC devices arranged on substrates such as silicon wafers is disclosed. In one aspect, the wafers are bonded by a direct bonding technique to form a wafer assembly, and the multiple IC devices are provided with metal contact structures. A TSV (Through Semiconductor Via) is produced through the bonded wafer assembly. The IC device or devices in the upper wafer or wafers have contact structures that serve as masks for the etching of the TSV opening. A conformal isolation liner is deposited in the TSV opening, and subsequently removed from the bottom and any horizontal areas in the TSV opening, while maintaining the liner on the sidewalls, followed by deposition of a TSV plug in the TSV opening. The removal of the liner is done without applying a lithography step.

First claim

What is claimed is:

1. A method for bonding and interconnecting a first IC device arranged on a first substrate to a second IC device arranged on a second substrate, wherein each IC device comprises a dielectric bonding layer at its outer surface, and wherein each IC device further comprises one or more metal contact structures, the method comprising the consecutive steps of:
positioning the first substrate with respect to the second substrate, with the bonding layers of the first and second IC device facing each other, by aligning a first metal contact structure in the first IC device to a second metal contact structure in the second IC device;
direct bonding of the substrates, thereby forming a substrate assembly;
optionally thinning the first substrate;
producing by a lithography step and an etching procedure, a first opening in the first substrate, until reaching the first metal contact structure, wherein the first metal contact structure partially covers a cross-section of the first opening;
with the first metal contact structure acting as a mask, etching one or more second openings in the second substrate, stopping on the second metal contact structure, the first and second opening thereby forming an aggregate opening;
producing an isolation layer on the sidewalls and the bottom of at least the first opening;
removing the isolation layer from at least the bottom of the first opening, while maintaining the isolation layer on at least the sidewalls of the first opening, without applying a lithography step; and
producing a metal contact plug in the aggregate opening, the metal plug interconnecting the first and second contact structures,
wherein prior to the step of producing the first opening, the method further comprises bonding the opposite side of the first substrate to an additional substrate or substrate assembly, so that the second substrate is bonded to a stack of substrates, each substrate of the stack comprising a further IC device comprising a metal contact structure, and wherein
the step of producing the first opening comprises consecutive steps of etching openings through consecutive substrates of the stack, consecutively reaching a metal contact structure in the consecutive substrates, until reaching the first metal contact structure,
each of the metal structures in the consecutive substrates serves as a mask for the consecutive etching steps,
the isolation layer is deposited on horizontal areas of the consecutive metal contact structures serving as masks, and
the removing step includes removing the isolation layer from the horizontal areas.

2. The method according to claim 1 , wherein the isolation layer is produced on the sidewalls and the bottom of the first opening prior to the step of etching the second opening, and wherein the second opening is etched through the isolation layer at the bottom of the first opening, stopping on the second metal contact structure.

3. The method according to claim 1 , wherein the first and second openings and thereby the aggregate opening are produced in a single etching step, wherein the isolation layer is produced on the sidewalls and the bottom of the aggregate opening, and wherein the removing step includes removing the isolation layer from the bottom of the aggregate opening and from the portion of the first metal contact structure that is covering the cross-section, while maintaining the isolation layer on the sidewalls of the first and the second opening.

4. The method according to claim 1 , wherein each of the metal structures that serves as a mask is a metal contact pad provided with an opening, so that the aggregate opening is a pyramid-shaped opening with stepwise narrower portions.

5. The method according to claim 1 , wherein the metal structures comprise metal contact strips or grids of overlapping metal contact strips.

6. The method according to claim 1 , wherein the step of removing the isolation layer is performed by a plasma treatment comprising the steps of:
introducing the assembly in a plasma atmosphere comprising one or more polymer-forming components and one or more etching components,
treating the assembly by inducing a plasma such that a protective polymer layer is formed on at least portions of the isolation layer present on the upper surface of the assembly and on at least portions of the isolation layer present on upper portions of the sidewalls of the first opening, thereby protecting the portions of the isolation layer where the protective polymer layer is being formed, from the plasma, wherein portions of the isolating layer being exposed to the plasma are etched.

7. The method according to claim 6 , wherein the polymer-forming components are chosen from the group consisting of C4F6, CH4, C2H4 and CH3F.

8. The method according to claim 6 , wherein the etching components are chosen from the group consisting of CF4, C4F8, CHF3 and SF6.

9. The method according to claim 6 , wherein the plasma is induced by radio frequency power.

10. The method according to claim 6 , wherein the plasma atmosphere further comprises Ar, O2, N2 and/or CO.

11. The method according to claim 6 , the method further comprising removing the protective polymer layer after the plasma treatment.

12. The method according to claim 1 , wherein the removal of the isolation layer is performed using a Reactive Ion Etching (RIE) device.

13. A method for bonding and interconnecting a first IC device arranged on a first substrate to a second IC device arranged on a second substrate, wherein each IC device comprises a dielectric bonding layer at its outer surface, and wherein each IC device further comprises one or more metal contact structures, the method comprising the consecutive steps of:
positioning the first substrate with respect to the second substrate, with the bonding layers of the first and second IC device facing each other, by aligning a first metal contact structure in the first IC device to a second metal contact structure in the second IC device;
direct bonding of the substrates, thereby forming a substrate assembly;
optionally thinning the first substrate;
producing by a lithography step and an etching procedure, a first opening in the first substrate, until reaching the first metal contact structure, wherein the first metal contact structure partially covers a cross-section of the first opening;
with the first metal contact structure acting as a mask, etching one or more second openings in the second substrate, stopping on the second metal contact structure, the first and second opening thereby forming an aggregate opening;
producing an isolation layer on the sidewalls and the bottom of at least the first opening;
removing the isolation layer from at least the bottom of the first opening, while maintaining the isolation layer on at least the sidewalls of the first opening, without applying a lithography step; and
producing a metal contact plug in the aggregate opening, the metal plug interconnecting the first and second contact structures,
wherein the step of removing the isolation layer is performed by a plasma treatment comprising the steps of
introducing the assembly in a plasma atmosphere comprising one or more polymer-forming components and one or more etching components,
treating the assembly by inducing a plasma such that a protective polymer layer is formed on at least portions of the isolation layer present on the upper surface of the assembly and on at least portions of the isolation layer present on upper portions of the sidewalls of the first opening, thereby protecting the portions of the isolation layer where the protective polymer layer is being formed, from the pla

Assignees

• Imec Vzw

Inventors

• Beyne Eric

Classifications

• H10W20/0238

  comprising etching via holes through pads or through electrodes · CPC title

• H10W20/2134

  TSVs extending from the semiconductor wafer into back-end-of-line layers · CPC title

• H10W20/2125

  Top-view shapes · CPC title

• H10W20/0242

  comprising etching via holes from the back sides of the chips, wafers or substrates · CPC title

• H10W20/0234

  comprising etching via holes that stop on pads or on electrodes · CPC title