Hybrid switch including GaN HEMT and MOSFET

US9954522B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9954522-B2
Application numberUS-201715639183-A
CountryUS
Kind codeB2
Filing dateJun 30, 2017
Priority dateJul 21, 2016
Publication dateApr 24, 2018
Grant dateApr 24, 2018

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A hybrid switch apparatus includes a gate drive circuit producing a gate drive signal, a GaN high electron mobility transistor (HEMT) having a first gate, a first drain, and a first source. A silicon (Si) MOSFET has a second gate, a second drain, and a second source. The GaN HEMT and the Si MOSFET are connected in a parallel arrangement so that (i) the first drain and the second drain are electrically connected and (ii) the first source and the second source are electrically connected. The second gate is connected to the gate drive circuit output to receive the gate drive signal. A delay block has an input connected to the gate drive circuit output and an delay block output is configured to produce a delayed gate drive signal for driving the GaN HEMT.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: means for producing (i) a gate drive signal on a gate drive output and (ii) a delayed gate drive signal that is delayed relative to said gate drive signal, wherein said gate drive signal comprises an ON state and an OFF state; a first type of electrical switching device having a first gate, a first drain, and a first source; a second type of switching device different from said first type of switching device wherein said second type of switching device includes a second gate, a second drain, and a second source, said first type of switching device and said second type of switching device being electrically connected in a parallel arrangement wherein (i) said first drain and said second drain are electrically connected and (ii) said first source and said second source are electrically connected; wherein said first gate of said first type of switching device is electrically connected to said producing means to receive said delayed gate drive signal and said second gate of said second type of switching device is electrically connected to said producing means to receive said gate drive signal; wherein in said paralleled arrangement said second type of switching device has a source-drain reverse conduction voltage drop that is less than that of said first type of switching device such that when said gate drive signal and said delayed gate drive signal are in said OFF state, a reverse conduction current flow through said first type of switching device is inhibited relative to said second type of switching device. 2. The apparatus of claim 1 wherein said second type of switching device comprises a body diode between said second source and said second drain wherein said source-drain reverse conduction voltage drop is defined by said body diode when said gate drive signal and said delayed gate drive signal are in said OFF state. 3. The apparatus of claim 2 wherein said second type of switching device comprises a silicon (Si) MOSFET device. 4. The apparatus of claim 2 wherein said first type of switching device comprises a wide-bandgap (WBG) device. 5. The apparatus of claim 3 wherein said WBG device comprises one of a Silicon Carbide (SiC) device and a Gallium Nitride (GaN) HEMT. 6. The apparatus of claim 1 wherein said producing means comprises a gate drive circuit having at least one gate drive output configured to produce said gate drive signal on said gate drive output and a delay block having an output configured to produce said delayed gate drive signal. 7. The apparatus of claim 6 wherein said delay block comprises an resistor-capacitor (RC) circuit. 8. The apparatus of claim 1 wherein when said gate drive signal transitions from said ON state to said OFF state, said producing means delays a transition of said delayed gate drive signal from said ON state to said OFF state such that said second type of switching device is turned off while said first type of switching device remains on. 9. The apparatus of claim 8 wherein after said producing means delays a transition of said delayed gate drive signal from said ON state to said OFF state, said delayed gate drive signal in said OFF state turns off said first type of switching device wherein a switching-off loss of said apparatus is substantially undertaken by said first type of switching device. 10. The apparatus of claim 1 further comprising an electronic control unit configured to control said gate drive circuit in accordance with a zero voltage switching (ZVS) strategy, wherein said electronic control unit is configured to control said producing means to output said gate drive signal in said ON and OFF state, and wherein said electronic control unit is further configured to control said producing means in accordance with said ZVS strategy so as to transition said gate drive signal from said OFF state to said ON state. 11. The apparatus of claim 1 wherein said first type of switching device and said second type of switching device form a first hybrid switch arrangement, said apparatus further comprising a second hybrid switch arrangement replicating said first hybrid switch arrangement, and wherein said first and second sources of said first hybrid switch arrangement are connected to said first and second drains of said second hybrid switch arrangement at a common node. 12. The apparatus of claim 10 wherein said first and second hybrid switch arrangements are used in a bridge circuit. 13. An apparatus comprising: means for producing (i) a gate drive signal on a gate drive output and (ii) a delayed gate drive signal that is delayed relative to said gate drive signal, wherein said gate drive signal comprises an ON state and an OFF state; a first type of electrical switching device comprising a wide-bandgap (WBG) device having a first gate, a first drain, and a first source; a second type of switching device different from said first type of switching device wherein said second type of switching device includes a second gate, a second drain, and a second source, said first type of switching device and said second type of switching device being electrically connected in a parallel arrangement wherein (i) said first drain and said second drain are electrically connected and (ii) said first source and said second source are electrically connected; wherein said first gate of said first type of switching device is electrically connected to said producing means to receive said delayed gate drive signal and said second gate of said second type of switching device is electrically connected to said producing means to receive said gate drive signal; wherein in said paralleled arrangement said second type of switching device has a body diode between said second source and said second drain such that when said gate drive signal and said delayed gate drive signal are in said OFF state, a reverse conduction current flow through said second type of switching device is promoted and is inhibited in said first type of switching device; and wherein when said gate drive signal transitions from said ON state to said OFF state, said producing means delays a transition of said delayed gate drive signal from said ON state to said OFF state such that said second type of switching device is turned off while said first type of switching device remains on. 14. The apparatus of claim 13 wherein said second type of switching device comprises a silicon (Si) MOSFET device. 15. The apparatus of claim 13 wherein said WBG device comprises one of a Silicon Carbide (SiC) device and a Gallium Nitride (GaN) HEMT. 16. The apparatus of claim 13 wherein said producing means comprises a gate drive circuit having at least one gate drive output configured to produce said gate drive signal on said gate drive output and a delay block having an output configured to produce said delayed gate drive signal. 17. The apparatus of claim 13 wherein after said producing means delays a transition of said delayed gate drive signal from said ON state to said OFF state, said delayed gate drive signal in said OFF state turns off said first type of switching device wherein a switching-off loss of said apparatus is substantially undertaken by said first type of switching device. 18. The apparatus of claim 13 further comprising an electronic control unit configured to control said gate drive circuit in accordance with a zero voltage switching (ZVS) strategy, wherein said electronic control unit is configured to control said producing means to output said gate drive signal in said ON and OFF state, and wherein said ele

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What does patent US9954522B2 cover?
A hybrid switch apparatus includes a gate drive circuit producing a gate drive signal, a GaN high electron mobility transistor (HEMT) having a first gate, a first drain, and a first source. A silicon (Si) MOSFET has a second gate, a second drain, and a second source. The GaN HEMT and the Si MOSFET are connected in a parallel arrangement so that (i) the first drain and the second drain are elect…
Who is the assignee on this patent?
Hella Gmbh & Co Kgaa
What technology area does this patent fall under?
Primary CPC classification H03K17/284. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 24 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).