Method for forming solder bumps using sacrificial layer

Patent metadata

Field	Value
Publication number	US-9953908-B2
Application number	US-201514928263-A
Country	US
Kind code	B2
Filing date	Oct 30, 2015
Priority date	Oct 30, 2015
Publication date	Apr 24, 2018
Grant date	Apr 24, 2018

Abstract

A barrier layer is formed over electrically conductive contact pads on a substrate such as a wafer. A photoresist layer is applied over the barrier layer, and openings in the photoresist layer are filled with solder to form solder bumps. The barrier layer may be removed from within the openings prior to filling the openings with solder. The process is applicable to fine pitch architectures and chip size packaging substrates. The photoresist layer and portions of the barrier layer outside of the openings are removed following solder fill.

First claim

What is claimed as new is:

1. A method of making a circuit, comprising:
providing a plurality of spaced apart conductive contact pads on a substrate, wherein each conductive contact pad is separated by a solder resist and each solder resist and each conductive pad is in direct physical contact with a surface of the substrate;
forming a metallic layer on physically exposed surfaces of each conductive contact pad and each solder resist;
applying a photoresist layer on the metallic layer;
forming a plurality of first openings in the photoresist layer exposing portions of the metallic layer;
etching the exposed portions of the metallic layer to physically expose a topmost surface of each conductive contact pad, while maintaining portions of the metallic layer on the solder resist that is located beneath remaining portions of the photoresist layer;
placing solder directly on the physically exposed topmost surface of each conductive contact pad;
removing, after the placing of the solder, the remaining portions of the photoresist layer with a chemical composition to expose the remaining portions of the metallic layer, the substrate being protected from the chemical composition by the remaining portions of the metallic layer; and
removing the remaining portions of the metallic layer to physically expose the solder resist that is in direct physical contact with the surface of the substrate.

2. The method of claim 1 , wherein the substrate is an organic substrate.

3. The method of claim 1 , wherein the photoresist layer comprises a dry film layer.

4. The method of claim 1 , wherein the metallic layer thickness is from 10 nm to 1000 nm.

5. The method of claim 1 , wherein the metallic layer comprises a metal selected from the group consisting of Al, Ti, Cr, Cu, Pd, Au, and alloys thereof.

6. The method of claim 1 , wherein the placing solder comprises passing a filling head containing molten solder over the photoresist layer and causing the filling head to inject molten solder to fill the first openings.

7. The method of claim 1 , wherein placing the solder comprises injecting flux-free molten solder into the first openings.

8. The method of claim 1 , wherein the chemical composition comprises dimethylsulfoxide.

Assignees

• IBM

Inventors

• Lewandowski Eric P
• Nah Jae-Woong
• Sorce Peter J

Classifications

• H10P76/204

  of organic photoresist masks · CPC title

• H10P50/264

  by chemical means · CPC title

• H10P14/412

  Deposition of metallic or metal-silicide materials · CPC title

• H10W72/012

  of bump connectors, dummy bumps or thermal bumps · CPC title

• H10W70/69

  Insulating materials thereof · CPC title