Packaged microsystems

US9950922B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9950922-B2
Application numberUS-201515127237-A
CountryUS
Kind codeB2
Filing dateMar 17, 2015
Priority dateMar 17, 2014
Publication dateApr 24, 2018
Grant dateApr 24, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A sub-millimeter packaged microsystem includes a microsystem located in a sealed cavity defined between first and second portions of a micropackage. One or both micropackage portions can be fabricated from a metal suitable for use in a harsh environment, such as an oil well environment. The microsystem includes electronic components and can be configured to communicate with external components through a wall of the micropackage by wireless communication or by conductive feedthroughs. Pluralities of microsystems, first micropackage portions, and/or second micropackage portions are simultaneously placed during a batch assembly process. The assembly process may include micro-crimping the first and second micropackaging portions together without the need for bonding materials and related process steps.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of packaging microsystems, comprising: (a) providing a plurality of microsystems, a plurality of first micropackage portions, and a plurality of second micropackage portions, at least one of said pluralities being provided in an array on a substrate; (b) placing each of the microsystems between one of the first micropackage portions and one of the second micropackage portions to form a corresponding array of packaged microsystems; and (c) releasing the packaged microsystems from the corresponding array to form a plurality of individual packaged microsystems, wherein the method further comprises: forming a trench in a wafer substrate to at least partially define the plurality of microsystems, whereby the plurality of microsystems is provided in the array of step (a); attaching the plurality of first micropackage portions to the wafer substrate so that one of the first micropackage portions is located at each one of the at least partially defined microsystems; and attaching the plurality of second micropackage portions to the plurality of first micropackage portions to form the corresponding array of packaged microsystems of step (b). 2. The method of claim 1 , wherein the step of forming includes forming the trench in a first side of the wafer substrate and partially through the thickness of the wafer substrate in a first direction, and the plurality of second micropackage portions is attached from an opposite second direction. 3. The method of claim 2 , further comprising, before step (b), forming a trench in an opposite second side of the wafer substrate to release the microsystems from one another. 4. The method of claim 2 , further comprising, before step (b), removing the excess thickness of the wafer substrate from an opposite second side of the wafer substrate to release the microsystems from one another. 5. The method of claim 1 , wherein step (b) includes individually placing each microsystem, each first micropackage portion, or each second micropackage portion into said corresponding array. 6. The method of claim 1 , further comprising the step of attaching the first and second micropackage portions together using a bonding material. 7. The method of claim 1 , further comprising the step of attaching the first and second micropackage portions together by pressing the first and second micropackage portions together and deforming at least one of the first or second micropackage portions. 8. The method of claim 1 , wherein step (a) comprises: providing the first micropackage portions on a carrier substrate in the array of step (a); providing the second micropackage portions on a carrier substrate in the array of step (a); or providing the first micropackage portions on a first carrier substrate in the array of step (a) and providing the second micropackage portions on a second carrier substrate in a corresponding array. 9. The method of claim 1 , wherein the first micropackage portions, the second micropackage portions, or both the first and the second micropackage portions include a feedthrough for external communication with the microsystems. 10. The method of claim 1 , wherein mating surfaces of the first and second micropackage portions have interlocking features. 11. The method of claim 1 , wherein one or both of the first and second micropackage portions is configured to be at least partially transparent to electromagnetic radiation. 12. The method of claim 11 , wherein both of the first and second micropackage portions are metal. 13. The method of claim 12 , wherein one of the first or second micropackage portions is stainless steel. 14. The method of claim 11 , wherein the portion(s) configured to be at least partially transparent to electromagnetic radiation comprises glass, stainless steel, aluminum, brass, or ceramic. 15. The method of claim 1 , wherein the packaged microsystems each include a pressure sensor and one or both of the first and second micropackage portions is configured to predictably deform in response to external pressure applied to the packaged microsystems. 16. The method of claim 1 , wherein the packaged microsystems are configured to withstand an external fluid pressure of 50 MPa or greater. 17. The method of claim 1 , wherein the external dimensions of the packaged microsystems corresponds to a volume of 1 mm 3 or less. 18. The method of claim 17 , wherein the volume is in a range from 0.125 mm 3 to 0.512 mm 3 . 19. The method of claim 1 , wherein the maximum external dimension of the packaged microsystems is less than 1 mm. 20. The method of claim 1 , further comprising the step of disposing a coating over at least a portion of the outer surfaces of the packaged microsystems, the coating comprising alumina and poly(p-xylylene). 21. A method of packaging microsystems, comprising: (a) locating a microsystem between first and second micropackage portions; and (b) pressing the first and second micropackage portions together, wherein at least one of the micropackage portions is configured to deform during step (b) to seal the microsystem in a cavity formed between the first and second micropackage portions, wherein the microsystem is one of a plurality of microsystems and each of the first and second micropackage portions is one of a plurality of first and second micropackage portions, at least one of said pluralities being provided in an array on a substrate before step (a), the method further comprising the step of releasing a plurality of individual packaged microsystems from the array after step (b). 22. The method of claim 21 , wherein step (a) includes locating a plurality of microsystems between a corresponding plurality of first and second micropackage portions such that each one of the microsystems is sealed in an individual cavity formed between one of the first micropackage portions and one of the second micropackage portions in step (b). 23. The method of claim 21 , wherein the cavity includes a filler material, the filler material being supported by one of the micropackage portions before step (b). 24. The method of claim 21 , wherein one or both of the first and second micropackage portions is configured to be at least partially transparent to electromagnetic radiation. 25. The method of claim 24 , wherein both of the first and second micropackage portions are metal. 26. The method of claim 25 , wherein one of the first or second micropackage portions is stainless steel. 27. The method of claim 24 , wherein the portion(s) configured to be at least partially transparent to electromagnetic radiation comprises glass, stainless steel, aluminum, brass, or ceramic. 28. The method of claim 21 , wherein the packaged microsystems each include a pressure sensor and one or both of the first and second micropackage portions is configured to predictably deform in response to external pressure applied to the packaged microsystems. 29. The method of claim 21 , wherein the packaged microsystems are configured to withstand an external fluid pressure of 50 MPa or greater. 30. The method of claim 21 , wherein the external dimensions of the packaged microsystems corresponds to a volume of 1 mm 3 or less. 31. The method of claim 30 , wherein the volume is in a range from 0.125 mm 3 to 0.512 mm 3 . 32.

Assignees

Inventors

Classifications

  • Active alignment, i.e. moving the elements in response to the detected position of the elements using internal or external actuators · CPC title

  • Aligning microparts · CPC title

  • Assembling of devices or systems from individually processed components · CPC title

  • for reducing stress inside of the package structure · CPC title

  • Packages or encapsulation (processes for packaging MEMS B81C1/00261; packaging of smart-MEMS B81C1/0023) · CPC title

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What does patent US9950922B2 cover?
A sub-millimeter packaged microsystem includes a microsystem located in a sealed cavity defined between first and second portions of a micropackage. One or both micropackage portions can be fabricated from a metal suitable for use in a harsh environment, such as an oil well environment. The microsystem includes electronic components and can be configured to communicate with external components …
Who is the assignee on this patent?
Univ Michigan Regents
What technology area does this patent fall under?
Primary CPC classification B81B7/0048. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Apr 24 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).