Thermoelectric module, and heat conversion apparatus comprising the same

Patent metadata

Field	Value
Publication number	US-9947854-B2
Application number	US-201414913220-A
Country	US
Kind code	B2
Filing date	Aug 20, 2014
Priority date	Aug 20, 2013
Publication date	Apr 17, 2018
Grant date	Apr 17, 2018

Abstract

The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness.

First claim

The invention claimed is:

1. A thermoelectric module comprising:
a first substrate and a second substrate configured to face each other; and
at least one unit cell including a first semiconductor element and a second semiconductor element which are electrically connected and interposed between the first substrate and the second substrate,
wherein volumes of the first substrate and the second substrate are different from each other, wherein an area of the second substrate is greater than an area of the first substrate, wherein a thickness of the first substrate is smaller than a thickness of the second substrate, wherein the second substrate is a heat-dissipation region, wherein the first substrate and the second substrate are metallic substrates, wherein at least one of the first semiconductor element or the second semiconductor element includes:
two or more unit members that are stacked on each other, each unit member of the two or more stacked unit members including a base material and a semiconductor layer on the base material; and
a conductive layer between adjacent unit members,
wherein each unit member of the two or more stacked unit members is provided parallel to the first substrate and the second substrate.

2. The thermoelectric module of claim 1 , further comprising heat-dissipation patterns which are concave-convex patterns formed on one surface of the second substrate.

3. The thermoelectric module of claim 2 , wherein the heat-dissipation patterns are disposed on a surface in contact with the first semiconductor element and the second semiconductor element.

4. The thermoelectric module of claim 1 , wherein an area ratio of the first substrate and the second substrate is in the range of 1:1.2 to 5.

5. The thermoelectric module of claim 1 , wherein the conductive layer includes a pattern by which a surface of each of the unit members is exposed.

6. The thermoelectric module of claim 5 , wherein the pattern is a mesh-type structure including a closed-type opening pattern or a line-type structure including an open-type opening pattern.

7. The thermoelectric module of claim 5 , wherein the conductive layer is a pattern layer implemented by a metallic material.

8. The thermoelectric module of claim 1 , further comprising electrode layers on the first substrate and the second substrate.

9. The thermoelectric module of claim 8 , further comprising dielectric layers between the first substrate and the electrode substrate and between the second substrate and the electrode substrate.

10. The thermoelectric module of claim 8 , wherein heights of the first semiconductor element and the second semiconductor element are in a range of 0.01 mm to 0.5 mm.

11. The thermoelectric module of claim 1 , wherein the first semiconductor element and the second semiconductor element are a mixture in which Bi or Te is mixed to a BiTe based main ingredient material.

12. A heat conversion apparatus comprising:
a thermoelectric module,
wherein the thermoelectric module includes:
a first substrate and a second substrate configured to face each other; and
at least one unit cell including a first semiconductor element and a second semiconductor element which are electrically connected and interposed between the first substrate and the second substrate,

wherein volumes of the first substrate and the second substrate are different from each other, wherein an area of the second substrate is greater than an area of the first substrate, wherein a thickness of the first substrate is smaller than a thickness of the second substrate, wherein the second substrate is a heat-dissipation region, wherein the first substrate and the second substrate are metallic substrates, wherein at least one of the first semiconductor element or the second semiconductor element includes:
two or more unit members that are stacked on each other, each unit member of the two or more stacked unit members including a base material and a semiconductor layer on the base material; and
a conductive layer between adjacent unit members,
wherein each unit member of the two or more stacked unit members is provided parallel to the first substrate and the second substrate.

Assignees

• Lg Innotek Co Ltd

Inventors

• Cho Yong Sang
• Kim Sang Gon
• Kim Sook Hyun
• Kim Chae Hoon
• Roh Myoung Lae
• Shin Jong Bae
• Won Boone
• Lee Jong Min

Classifications

• H01L35/32

  Electricity · mapped topic

• H01L35/30

  Electricity · mapped topic

• H01L35/325 Primary

  Electricity · mapped topic

• H10N10/17 Primary

  characterised by the structure or configuration of the cell or thermocouple forming the device · CPC title

• H10N19/101 Primary

  Multiple thermocouples connected in a cascade arrangement · CPC title