Semiconductor device

US9917183B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9917183-B2
Application numberUS-201514819068-A
CountryUS
Kind codeB2
Filing dateAug 5, 2015
Priority dateMar 9, 2015
Publication dateMar 13, 2018
Grant dateMar 13, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device is provided including a first electrode and a first semiconductor layer of a first conductivity type connected to the first electrode. The semiconductor device further includes a second semiconductor layer of a second conductivity type provided on the first semiconductor layer, a third semiconductor layer of the first conductivity type provided on the second semiconductor layer, and a second electrode provided on the third semiconductor layer. The semiconductor device further includes a third electrode disposed between the first electrode and the second electrode. The semiconductor device further includes a fourth electrode having an upper end connected to the second electrode, where the fourth electrode has a higher resistivity than the second electrode.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a first electrode; a first semiconductor layer of a first conductivity type on the first electrode and electrically connected to the first electrode; a second semiconductor layer of a second conductivity type on the first semiconductor layer; a third semiconductor layer of the first conductivity type on the second semiconductor layer; a first insulation material disposed in a trench extending through the third semiconductor layer and the second semiconductor layer and into the first semiconductor layer; a second electrode on the third semiconductor layer and a surface of the first insulation material and electrically connected to the third semiconductor layer; a third electrode disposed in the first insulation material in the trench and adjacent, in a first direction, via the first insulation material to the second semiconductor layer, the third electrode being between the first electrode and the second electrode in a second direction that crosses the first direction, a portion of the first insulation material being between the third electrode and the second electrode in the second direction and electrically separating the third electrode and the second electrode; and a fourth electrode disposed in the first insulation material in the trench and extending in the second direction through the first insulation material to have a first end electrically contacting a lower surface of the second electrode, the fourth electrode separated from the first semiconductor layer, the second semiconductor layer, the third semiconductor layer, and the third electrode by the first insulation material, an electrical resistivity of the fourth electrode being greater than an electrical resistivity of the second electrode, wherein the third electrode comprises a pair of third electrode portions disposed in the first insulation material in the trench and spaced apart from each other in the first direction, the fourth electrode extends along the second direction between the pair of third electrode portions, the fourth electrode has a second end spaced from the first end in the second direction, the first end has a first width along the first direction, the second end has a second width along the first direction, the first width is less than the second width, and the fourth electrode has a width, in the first direction, that varies from the first width to the second width, and a maximum width of the fourth electrode is between the first and second ends, the maximum width being greater than the second width. 2. The semiconductor device according to claim 1 , wherein the second electrode comprises metal, and the fourth electrode comprises silicon. 3. The semiconductor device according to claim 1 , wherein the lower surface of the second electrode is flat, and the first end of the fourth electrode is in direct contact with the lower surface of the second electrode for a distance along a third direction that is orthogonal to the first and second directions equal to an entire length of the fourth electrode along the third direction. 4. The semiconductor device according to claim 1 , further comprising: a fourth semiconductor layer of the second conductivity type extending from the lower surface of the second electrode through the third semiconductor layer into the second semiconductor layer, a concentration of second conductivity type dopants in the fourth semiconductor layer being greater than a concentration of second conductivity type dopants in the second semiconductor layer. 5. The semiconductor device according to claim 1 , further comprising: a fourth semiconductor layer of the second conductivity type disposed in the second semiconductor layer, a concentration of second conductivity type dopants in the fourth semiconductor layer being greater than a concentration of second conductivity type dopants in the second semiconductor layer, wherein a first protruding portion on the lower surface of the second electrode is connected to the fourth semiconductor layer. 6. The semiconductor device according to claim 5 , wherein a second protruding portion on the lower surface of the second electrode extends in the second direction through the first insulation material and directly contacts the first end of the fourth electrode. 7. The semiconductor device according to claim 1 , wherein a second protruding portion on the lower surface of the second electrode directly contacts the first end of fourth electrode. 8. A semiconductor device, comprising: a first semiconductor layer of a first conductivity type on a first electrode; a second semiconductor layer of a second conductivity type on the first semiconductor layer; a third semiconductor layer of the first conductivity type on the second semiconductor layer; a second electrode contacting the third semiconductor layer; a first insulation material disposed in a trench extending through the third semiconductor layer and into the first semiconductor layer; a pair of third electrodes disposed in the first insulation material in the trench and spaced from each other in a first direction, the first insulation material contacting the first, second, and third semiconductor layers and a lower surface of the second electrode, the lower surface being parallel to the first direction, the first insulation material separating the pair of third electrodes from the lower surface of the second electrode; and a fourth electrode disposed in the first insulation material in the trench between the first and second electrodes in a second direction perpendicular to the first direction and between the pair of third electrodes in the first direction, the fourth electrode being separated from the pair of third electrodes by the first insulation material, wherein a first end of the fourth electrode nearest the lower surface of the second electrode is directly contacting the lower surface of the second electrode, the fourth electrode has a second end spaced from the first end in the second direction, the first end has a first width along the first direction, the second end has a second width along the first direction, the first width is less than the second width, and the fourth electrode has a width, in the first direction, that varies from the first width to the second width, and a maximum width of the fourth electrode is between the first and second ends, the maximum width being greater than the second width. 9. The semiconductor device according to claim 8 , wherein the second electrode comprises metal, and the fourth electrode comprises silicon. 10. The semiconductor device according to claim 8 , wherein the fourth electrode extends in a third direction that is perpendicular to the first and second directions, and the fourth electrode is in direct contact with the lower surface of the second electrode for an entire length of the fourth electrode along the third direction. 11. The semiconductor device according to claim 8 , further comprising: a fourth semiconductor layer of the second conductivity type disposed in the second semiconductor layer, a concentration of second conductivity type dopants in the fourth semiconductor layer being greater than a concentration of second conductivity type dopants in the second semiconductor layer, wherein a first protruding portion on the lower surface of the second electrode is connected to the fourth semiconductor layer. 12. The semiconductor device according to claim 11 , wherein a second protruding portion on the lower surface of the second electrode extends in the second direction through the first insulation material and directly c

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673) · CPC title

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Frequently asked questions

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What does patent US9917183B2 cover?
A semiconductor device is provided including a first electrode and a first semiconductor layer of a first conductivity type connected to the first electrode. The semiconductor device further includes a second semiconductor layer of a second conductivity type provided on the first semiconductor layer, a third semiconductor layer of the first conductivity type provided on the second semiconductor…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H01L29/7813. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 13 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).