Silicon single crystal wafer, manufacturing method thereof and method of detecting defects

US9917022B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9917022-B2
Application numberUS-201615198770-A
CountryUS
Kind codeB2
Filing dateJun 30, 2016
Priority dateJan 8, 2013
Publication dateMar 13, 2018
Grant dateMar 13, 2018

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A silicon single crystal wafer is provided. The silicon single crystal wafer includes an IDP which is divided into an NiG region and an NIDP region, wherein the IDP region is a region where a Cu based defect is not detected, the NiG region is a region where an Ni based defect is detected and the NIPD region is a region where an Ni based defect is not detected.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of detecting a silicon single crystal wafer, the method comprising: coating a nickel (Ni) solution onto the silicon single crystal wafer to form a metal precipitate in the silicon single crystal wafer; performing a first heat treatment so as to form a core of the metal precipitate; performing a second heat treatment to expand the core of the metal precipitate; etching the silicon single crystal wafer having the expanded core of the metal precipitate; and detecting a defect in the etched silicon single crystal wafer based on the expanded core of the metal precipitate. 2. The method according to claim 1 , wherein the metal precipitate is formed by reaction of nickel (Ni) in the nickel (Ni) solution to an oxygen (O) precipitate of the silicon single crystal wafer. 3. The method according to claim 1 , wherein a concentration of nickel (Ni) in the nickel (Ni) solution is equal to or greater than at least 1E 13 atom/cm 2 . 4. The method according to claim 1 , wherein the first heat treatment is performed at a temperature of about 870° C. for about four hours. 5. The method according to claim 1 , wherein in performing the second heat treatment, the core of the metal precipitate is used as a seed to expand the core of the metal precipitate. 6. The method according to claim 1 , wherein the second heat treatment is performed at a temperature of about 1000° C. for about one hour to three hours. 7. The method according to claim 1 , wherein etching the silicon single crystal wafer exposes the expanded core of the metal precipitate and forms a step difference between a first region where the metal precipitate is not formed and a second region where the metal precipitate is formed. 8. The method according to claim 1 , further comprising: prior to performing the first heat treatment, if an oxygen (O) concentration of the silicon single crystal wafer is determined to be equal to or less than a threshold concentration, performing a prior heat treatment, and if the oxygen (O) concentration of the silicon single crystal wafer is greater than the threshold concentration, performing the first heat treatment without the prior heat treatment. 9. The method according to claim 8 , wherein the threshold concentration is about 8 ppma. 10. The method according to claim 8 , wherein the prior heat treatment is performed at a temperature of about 800° C. for about four hours.

Assignees

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Classifications

  • Thermal treatments, e.g. annealing or sintering · CPC title

  • Chemical etching · CPC title

  • H10P36/20Primary

    Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body · CPC title

  • Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing · CPC title

  • Monocrystalline · CPC title

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What does patent US9917022B2 cover?
A silicon single crystal wafer is provided. The silicon single crystal wafer includes an IDP which is divided into an NiG region and an NIDP region, wherein the IDP region is a region where a Cu based defect is not detected, the NiG region is a region where an Ni based defect is detected and the NIPD region is a region where an Ni based defect is not detected.
Who is the assignee on this patent?
Lg Siltron Inc, Sk Siltron Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P36/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 13 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).