Modular fuses and antifuses for integrated circuits

Patent metadata

Field	Value
Publication number	US-9905511-B2
Application number	US-201514937812-A
Country	US
Kind code	B2
Filing date	Nov 10, 2015
Priority date	Jun 28, 2013
Publication date	Feb 27, 2018
Grant date	Feb 27, 2018

Abstract

Nanoscale efuses, antifuses, and planar coil inductors are disclosed. A copper damascene process can be used to make all of these circuit elements. A low-temperature copper etch process can be used to make the efuses and efuse-like inductors. The circuit elements can be designed and constructed in a modular fashion by linking a matrix of metal columns in different configurations and sizes. The number of metal columns, or the size of a dielectric mesh included in the circuit element, determines its electrical characteristics. Alternatively, the efuses and inductors can be formed from interstitial metal that is either deposited into a matrix of dielectric columns, or left behind after etching columnar openings in a block of metal. Arrays of metal columns also serve a second function as features that can improve polish uniformity in place of conventional dummy structures. Use of such modular arrays provides flexibility to integrated circuit designers.

First claim

The invention claimed is:

1. A microelectronic device comprising:
a dielectric layer having a first surface;
an array of metal columns extending into the dielectric layer from the first surface; and
a plurality of metal links coupling a selected number of adjacent metal columns in a spiral configuration so as to form a continuous planar metal coil, a length of the spiral configuration determining an inductance of the device.

2. The microelectronic device of claim 1 wherein the array of metal columns includes one or more metal structures outside of the spiral configuration that serve as dummy structures for a metal planarization process.

3. The microelectronic device of claim 1 wherein the selected number of adjacent metal columns is programmably selected.

4. The microelectronic device of claim 1 wherein the metal columns are round cylinders.

5. The microelectronic device of claim 1 wherein the metal columns are square cylinders.

6. A microelectronic device comprising:
a substrate;
an array of dielectric columns on the substrate;
a plurality of dielectric links on the substrate, a number of the dielectric links coupling adjacent dielectric columns in a spiral configuration; and
a continuous planar metal coil contiguous to the spiral configuration, the number of adjacent dielectric columns coupled together determining an inductance of the device.

7. The microelectronic device of claim 6 wherein a subset of the dielectric columns that are located around a perimeter of the spiral configuration serve as dummy structures for a dielectric planarization process.

8. The microelectronic device of claim 6 wherein the number of adjacent dielectric columns is programmably selected.

9. The microelectronic device of claim 6 further comprising:
a metal liner between the metal coil and the dielectric columns the dielectric links.

10. A method of making a microelectronic circuit element, the method comprising:
forming a dielectric block;
patterning the dielectric block with an array of openings;
patterning the dielectric block with links to connect selected ones of the array of openings to form a geometrical shape;
filling the patterned array of openings and the patterned links with metal; and
planarizing the patterned dielectric block.

11. The method of claim 10 wherein the patterning the dielectric block with links including forming a planar spiral coil and the microelectronic circuit element is an inductor.

12. The method of claim 10 wherein the patterning the dielectric block with links forms a series of planes and the microelectronic circuit element is a metal serpentine resistor suitable for use as a microelectronic fuse.

13. A method of making a microelectronic circuit element, the method comprising:
forming a metal block;
patterning the metal block with an array of openings;
patterning the metal block with links to connect selected ones of the array of openings to form a geometrical shape;
filling the openings and the links with a dielectric material; and
planarizing the array.

14. The method of claim 13 wherein the patterning the metal with links includes forming a spiral coil and the circuit element is an inductor.

15. The method of claim 13 wherein the patterning the metal with links forms a series of planes and the circuit element is a metal serpentine resistor suitable for use as a microelectronic fuse.

16. A microelectronic device comprising:
a dielectric layer;
an array of metal columns in the dielectric layer;
a plurality of metal links coupling a selected number of adjacent metal columns in a spiral configuration to form a continuous planar metal coil, a length of the spiral configuration determining an inductance of the device;
a first contact pad coupled to a first end of the metal coil; and
a second contact pad coupled to a second end of the metal coil.

17. The microelectronic device of claim 16 further comprising:
a metal liner between the dielectric layer and the metal columns and between the dielectric layer and the metal links.

18. The microelectronic device of claim 16 wherein the metal columns and the metal links are copper.

19. The microelectronic device of claim 16 wherein the dielectric columns are round cylinders.

20. The microelectronic device of claim 16 wherein the dielectric columns are square cylinders.

Assignees

• St Microelectronics Inc
• IBM

Inventors

• Zhang John H
• Xu Yiheng
• Clevenger Lawrence A
• Radens Carl
• Wornyo Edem

Classifications

• H10W20/497

  Inductive arrangements or effects of, or between, wiring layers · CPC title

• H10W20/491

  Antifuses, i.e. interconnections changeable from non-conductive to conductive · CPC title

• H10W20/40

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

• H10W20/493 Primary

  Fuses, i.e. interconnections changeable from conductive to non-conductive · CPC title

• H01L23/522

  Electricity · mapped topic