Method for controlling exhaust flow in wafer processing module

US9892982B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9892982-B2
Application numberUS-201414146996-A
CountryUS
Kind codeB2
Filing dateJan 3, 2014
Priority dateJan 3, 2014
Publication dateFeb 13, 2018
Grant dateFeb 13, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of mechanisms for processing a wafer are provided. A method for processing a wafer includes placing the wafer into a processing assembly and heating the wafer. The method also includes producing an exhaust flow from the processing assembly via a fluid-conduit assembly. The method further includes detecting an exhaust pressure of the exhaust flow in the fluid-conduit assembly and producing a first signal and a second signal corresponding to the exhaust pressure. In addition, the method includes regulating the exhaust flow in response to the first signal and controlling the processing assembly in response to the second signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for processing wafers, comprising: heating the wafers in a first processing assembly and a second processing assembly; producing an exhaust flow from the first processing assembly via a first domain conduit; producing another exhaust flow from the second processing assembly via a second domain conduit; guiding the exhaust flows from the first and second domain conduits to a main conduit; detecting a first concentration of contamination particles of the exhaust flow in the first domain conduit and sending a first signal corresponding to the first concentration to an FDC module; detecting a second concentration of contamination particles of the exhaust flow in the second domain conduit and producing a second signal corresponding to the second concentration; detecting an exhaust pressure of the exhaust flow in the main conduit and producing a third signal corresponding to the exhaust pressure, wherein the first concentration and the second concentration are detected at locations upstream of a location used for detecting the exhaust pressure; regulating the exhaust flows in response to the third signal; controlling the first processing assembly in response to the first signal such that, if the first concentration is outside of a predetermined specification and is not adjusted after a predetermined period of time to be within the predetermined specification, operation of the first processing assembly is stopped, wherein the controlling of the first processing assembly in response to the first signal comprises changing a temperature of a plate in the first processing assembly for heating the wafer by the FDC module; and controlling the second processing assembly in response to the second signal such that, if the second concentration is outside of a predetermined specification and is not adjusted after a predetermined period of time to be within the predetermined specification, operation of the second processing assembly is stopped. 2. The method as claimed in claim 1 , further comprising regulating the exhaust flows by increasing the amount of the exhaust flows or increasing the flow rate of the exhaust flows. 3. The method as claimed in claim 2 , further comprising transmitting the third signal to a controller and controlling a control valve in the main conduit by the controller to adjust the amount of the exhaust flows. 4. The method as claimed in claim 1 , wherein the wafers are heated in the processing assembly to a temperature in a range from about 200° C. to about 250° C. 5. The method as claimed in claim 1 , wherein before the wafers are heated, a bottom anti-reflective coating is formed over the wafer. 6. The method as claimed in claim 1 , further comprising regulating the exhaust flow in response to the first signal, wherein the first signal is transmitted to a gas-handling apparatus which actuates the exhaust flow from the first processing assembly via the domain conduit and the main conduit, and the flow rate of the exhaust flow is adjusted by the gas-handling apparatus in response to the first signal. 7. A method for processing wafers, comprising: forming a bottom anti-reflective coating over the wafers; placing the wafers into two processing assemblies and heating the wafers in the two processing assemblies; producing an exhaust flow from the two processing assemblies via two domain conduits; guiding the exhaust flows from the two domain conduits to a main conduit; regulating the exhaust flow if an exhaust pressure of the exhaust flow in the main conduit is outside of a predetermined specification; monitoring a concentration of contamination particles of the exhaust flow in the two domain conduits that are at two locations upstream of a location used for performing the regulating; stopping heating the wafer in one of the two processing assemblies if the monitoring indicated that the concentration of contamination particles of the exhaust flow in the corresponding domain conduit is outside of the predetermined specification for a predetermined period of time; regulating the exhaust flow in accordance with an electrical signal that corresponds to the exhaust pressure of the exhaust flow; and regulating the exhaust flow by a gas-handling apparatus in response to electrical signals corresponding to the concentration of contamination particles of the exhaust flow in the two domain conduits, wherein the gas-handling apparatus actuates the exhaust flow from the processing assemblies via the two domain conduit and the main conduit. 8. The method as claimed in claim 7 , further comprising regulating the exhaust flow by adjusting the amount of the exhaust flow or adjusting the flow rate of the exhaust flow. 9. The method as claimed in claim 7 , further comprising regulating the exhaust flow in each domain conduit independently. 10. The method as claimed in claim 7 , wherein the wafers are heated in the two processing assemblies to a temperature in a range from about 200° C. to about 250° C. 11. The method as claimed in claim 7 , wherein the electrical signal corresponding to the exhaust pressure of the exhaust flow is issued by a feedback sensor configured to detect the exhaust pressure in the main conduit which is connected to two processing assemblies. 12. The method as claimed in claim 7 , wherein the electrical signal corresponding to the exhaust pressure of the exhaust flow is issued by sensors configured to detect the exhaust pressure in the domain conduits which are immediately connected to two processing assemblies. 13. The method as claimed in claim 7 , further comprising: sending electrical signals corresponding to the concentration of contamination particles of the exhaust flow in the two domain conduits to an FDC module; and controlling a temperature of a plate in one of the processing assemblies for heating the wafer by the FDC module in response to the electrical signals corresponding to concentration of contamination particles of the exhaust flow from the corresponding domain conduit.

Assignees

Inventors

Classifications

  • using an anti-reflective coating · CPC title

  • Process monitoring, e.g. flow or thickness monitoring · CPC title

  • Apparatus for fluid treatment (H10P72/0441, H10P72/0448 take precedence) · CPC title

  • H10P74/238Primary

    comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement · CPC title

  • H01L22/26Primary

    Electricity · mapped topic

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What does patent US9892982B2 cover?
Embodiments of mechanisms for processing a wafer are provided. A method for processing a wafer includes placing the wafer into a processing assembly and heating the wafer. The method also includes producing an exhaust flow from the processing assembly via a fluid-conduit assembly. The method further includes detecting an exhaust pressure of the exhaust flow in the fluid-conduit assembly and pro…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd, Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P72/0604. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 13 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).