Bus for communication between devices

US9886401B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9886401-B2
Application numberUS-201615270858-A
CountryUS
Kind codeB2
Filing dateSep 20, 2016
Priority dateJun 11, 2013
Publication dateFeb 6, 2018
Grant dateFeb 6, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Techniques and configurations are disclosed herein for communication between devices. In some embodiments, a bus for communication between first and second devices may include a transmit buffer and one or more processing devices. The one or more processing devices may be configured to receive first asynchronous data from an operating system, running on a central processing unit of the first device, on an operating system signal path; transmit the first asynchronous data from the first device to the second device on a command signal path; transmit first data from the transmit buffer to the second device at a first fixed packet frequency on a transmit signal path; and receive data from the second device at a second fixed packet frequency on a receive signal path different from the transmit signal path. Other embodiments may be disclosed and/or claimed.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus for communication between first and second devices, comprising: a transmit buffer; and one or more processing devices to: receive command data from a first device on a system signal path; transmit the command data from the first device to a second device on an asynchronous transmit signal path; transmit data from the transmit buffer to the second device on an isochronous transmit signal path; receive data from the second device on an isochronous receive signal path, wherein the isochronous receive signal path is different from the isochronous transmit signal path; and receive asynchronous data from the second device on an asynchronous receive signal path. 2. The apparatus of claim 1 , further comprising: a receive buffer; wherein the one or more processing devices of the apparatus are further to: store in the receive buffer the data to be received from the second device; and transmit the data from the receive buffer for access by a program to operate on a processing unit of the first device. 3. The apparatus of claim 1 wherein the one or more processing devices of the apparatus are further to receive fault information from the second device on a fault signal path different from the asynchronous receive signal path. 4. The apparatus of claim 1 , wherein the one or more processing devices of the apparatus are further to transmit a reset signal to the second device on a reset signal path different from the asynchronous transmit signal path. 5. A system, comprising: a first device that includes: one or more processing devices of the first device; and machine-readable media that have stored thereon machine-readable instructions that, when executed by the one or more processing devices of the first device, cause the one or more processing devices of the first device to provide command data to control a second device; and a communication apparatus that includes: a transmit buffer; and one or more processing devices of the communication apparatus to: receive the command data from the first device on a system signal path; transmit the command data to the second device on an asynchronous transmit signal path; transmit data from the transmit buffer to the second device on an isochronous transmit signal path; receive data from the second device on an isochronous receive signal path; and receive asynchronous data from the second device on an asynchronous receive signal path. 6. The system of claim 5 , wherein the isochronous receive signal path is different from the isochronous transmit signal path. 7. The system of claim 5 , wherein the communication apparatus further comprises: a receive buffer; wherein the one or more processing devices of the communication apparatus are further to: store in the receive buffer the data to be received from the second device; and transmit the data from the receive buffer to the first device to be processed by the one or more processing devices of the first device according to machine-readable instructions stored on the machine-readable media of the first device. 8. The system of claim 5 wherein the one or more processing devices of the communication apparatus are further to receive fault information from the second device on a fault signal path different from the asynchronous receive signal path. 9. The system of claim 5 , wherein the one or more processing devices of the apparatus are further to transmit a reset signal to the second device on a reset signal path different from the asynchronous transmit signal path. 10. An apparatus, comprising: means to transmit command data to a test device on an asynchronous transmit signal path; means to transmit data to the test device on an isochronous transmit signal path; means to receive data from the test device on an isochronous receive signal path, wherein the isochronous receive signal path is different from the isochronous transmit signal path; and means to receive asynchronous data from a second device on an asynchronous receive signal path. 11. The apparatus of claim 10 , wherein the apparatus further comprises means to receive the command data from a first device on a system signal path. 12. The apparatus of claim 11 , further comprising: a receive buffer; means to store in the receive buffer the data to be received from the test device; and means to transmit the data from the receive buffer to the first device to be processed. 13. The apparatus of claim 10 wherein the apparatus further comprises means to receive fault information from the second device on a fault signal path different from the asynchronous receive signal path. 14. The apparatus of claim 10 , wherein the apparatus further comprises means to transmit a reset signal to the second device on a reset signal path different from the asynchronous transmit signal path. 15. A method, comprising: receiving command data from a first device on a system signal path; transmitting the command data on an asynchronous transmit signal path to a second device; transmitting data to the second device on an isochronous transmit signal path; receiving data from the second device on an isochronous receive signal path, wherein the isochronous receive signal path is different from the isochronous transmit signal path; and receiving asynchronous data from the second device on an asynchronous receive signal path. 16. The method of claim 15 , further comprising: storing in a receive buffer the data received from the second device; and transmitting the data from the receive buffer for processing by the first device. 17. The method of claim 15 wherein the method further comprises receiving fault information from the second device on a fault signal path different from the asynchronous receive signal path. 18. The method of claim 15 , wherein the method further comprises transmitting a reset signal to the second device on a reset signal path different from the asynchronous transmit signal path.

Assignees

Inventors

Classifications

  • G06F11/221Primary

    to test buses, lines or interfaces, e.g. stuck-at or open line faults · CPC title

  • Root cause analysis, i.e. error or fault diagnosis (in a hardware test environment G06F11/22; in a software test environment G06F11/36) · CPC title

  • in an input/output transactions management context (input/output processing in general G06F13/00) · CPC title

  • Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers · CPC title

  • using buffers · CPC title

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What does patent US9886401B2 cover?
Techniques and configurations are disclosed herein for communication between devices. In some embodiments, a bus for communication between first and second devices may include a transmit buffer and one or more processing devices. The one or more processing devices may be configured to receive first asynchronous data from an operating system, running on a central processing unit of the first dev…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F11/221. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 06 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).