Semiconductor device

US9875965B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9875965-B2
Application numberUS-201615210623-A
CountryUS
Kind codeB2
Filing dateJul 14, 2016
Priority dateJan 21, 2014
Publication dateJan 23, 2018
Grant dateJan 23, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Semiconductor devices and fabrication methods are provided. In a semiconductor device, a semiconductor substrate includes a first electrode layer having a top surface coplanar with a top surface of the semiconductor substrate. A sacrificial layer is formed on the semiconductor substrate and the first electrode layer. A first mask layer made of a conductive material is formed on the sacrificial layer. The first mask layer and the sacrificial layer are etched until a surface of the first electrode layer is exposed to form openings through the first mask layer and the sacrificial layer. A cleaning process is performed to remove etch byproducts adhered to a surface of the first mask layer and adhered to sidewalls and bottom surfaces of the openings. Conductive plugs are formed in the openings after the cleaning process.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a semiconductor substrate; a first electrode layer disposed in the semiconductor substrate, wherein the first electrode layer has a top surface coplanar with a top surface of the semiconductor substrate; a sacrificial layer on the semiconductor substrate and the first electrode layer; a first mask layer on the sacrificial layer, wherein the first mask layer is made of a conductive material; and conductive plugs formed through the first mask layer, through the sacrificial layer, and on a surface of the first electrode layer, wherein the first mask layer comprises at least one through hole located between two adjacent conductive plugs, and wherein the sacrificial layer comprises a cavity under the at least one through hole, the first mask layer is overhung above the first electrode layer, and the first mask layer is used as a second electrode layer of a pressure sensor. 2. The device according to claim 1 , further comprising a second mask layer disposed between the first mask layer and the sacrificial layer. 3. The device according to claim 2 , wherein the second mask layer is made of Si 3 N 4 , with a thickness in a range of about 150 Å to about 250 Å. 4. The device according to claim 1 , wherein the first mask layer is made of Ti, TiN, TaN, Al, or a combination thereof, and wherein the first mask layer has a thickness of about 200 Å to about 300 Å. 5. The device according to claim 1 , further including a humidity sensor comprising an isolation layer and at least two separate sub-electrodes from the first electrode layer, wherein the isolation layer includes a humidity-sensitive dielectric material. 6. The device according to claim 1 , wherein: the conductive plugs are made of Cu, W, Al, or a combination thereof. 7. A semiconductor device, comprising: a semiconductor substrate; a first electrode layer disposed in the semiconductor substrate, wherein the first electrode layer has a top surface coplanar with a top surface of the semiconductor substrate; a sacrificial layer on the semiconductor substrate and the first electrode layer; a first mask layer on the sacrificial layer, wherein the first mask layer is made of a conductive material; and conductive plugs formed through the first mask layer, through the sacrificial layer, and on a surface of the first electrode layer, wherein: the sacrificial layer comprises a cavity under the first mask layer between the first electrode layer and the first mask layer, and the first mask layer is overhung above the first electrode layer, and the first mask layer is used as a second electrode layer of a pressure sensor. 8. The semiconductor device according to claim 7 , wherein the substrate further includes: a semiconductor substrate; semiconductor components on the semiconductor substrate or in the semiconductor substrate; electrical interconnect structures, wherein the first electrode layer is electrically connected to the semiconductor components via the electrical interconnect structures; and an isolation layer, configured to provide electrical isolation between the semiconductor components and the electrical interconnect structures. 9. A semiconductor device, comprising: a semiconductor substrate; a first electrode layer disposed in the semiconductor substrate, wherein the first electrode layer has a top surface coplanar with a top surface of the semiconductor substrate; a sacrificial layer on the semiconductor substrate and the first electrode layer; a first mask layer on the sacrificial layer, wherein the first mask layer is made of a conductive material; and conductive plugs formed through the first mask layer, through the sacrificial layer, and on a surface of the first electrode layer, wherein the substrate further includes: a semiconductor substrate; semiconductor components on the semiconductor substrate or in the semiconductor substrate; electrical interconnect structures, wherein the first electrode layer is electrically connected to the semiconductor components via the electrical interconnect structures; and an isolation layer, configured to provide electrical isolation between the semiconductor components and the electrical interconnect structures. 10. The semiconductor device according to claim 9 , further comprising a second mask layer disposed between the first mask layer and the sacrificial layer. 11. The semiconductor device according to claim 10 , wherein the second mask layer is made of Si 3 N 4 , with a thickness in a range of about 150 Å to about 250 Å. 12. The semiconductor device according to claim 9 , wherein the sacrificial layer comprises a cavity under the first mask layer between the first electrode layer and the first mask layer, the first mask layer is overhung above the first electrode layer, and the first mask layer is used as a second electrode layer of a pressure sensor. 13. The semiconductor device according to claim 9 , wherein the first mask layer is made of Ti, TiN, TaN, Al, or a combination thereof, and wherein the first mask layer has a thickness of about 200 Å to about 300 Å. 14. The semiconductor device according to claim 9 , further comprising a humidity sensor, the humidity sensor comprising an isolation layer and at least two separate sub-electrodes from the first electrode layer, wherein the isolation layer includes a humidity-sensitive dielectric material. 15. The semiconductor device according to claim 9 , wherein the conductive plugs are made of Cu, W, Al, or a combination thereof.

Assignees

Inventors

Classifications

  • during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers · CPC title

  • using masks · CPC title

  • the thin functional dielectric layers being temporary, e.g. sacrificial layers · CPC title

  • Noble-metal alloys · CPC title

  • Copper alloys · CPC title

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Frequently asked questions

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What does patent US9875965B2 cover?
Semiconductor devices and fabrication methods are provided. In a semiconductor device, a semiconductor substrate includes a first electrode layer having a top surface coplanar with a top surface of the semiconductor substrate. A sacrificial layer is formed on the semiconductor substrate and the first electrode layer. A first mask layer made of a conductive material is formed on the sacrificial …
Who is the assignee on this patent?
Semiconductor Mfg International (Shanghai) Corporation
What technology area does this patent fall under?
Primary CPC classification H10W20/435. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).