Integrated vacuum microelectronic structure and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9865421-B2
Application number	US-201615291962-A
Country	US
Kind code	B2
Filing date	Oct 12, 2016
Priority date	Mar 31, 2014
Publication date	Jan 9, 2018
Grant date	Jan 9, 2018

Abstract

An integrated vacuum microelectronic structure is described as having a highly doped semiconductor substrate, a first insulating layer placed above said doped semiconductor substrate, a first conductive layer placed above said first insulating layer, a second insulating layer placed above said first conductive layer, a vacuum trench formed within said first and second insulating layers and extending to the highly doped semiconductor substrate, a second conductive layer placed above said vacuum trench and acting as a cathode, a third metal layer placed under said highly doped semiconductor substrate and acting as an anode, said second conductive layer is placed adjacent to the upper edge of said vacuum trench, the first conductive layer is separated from said vacuum trench by portions of said second insulating layer and is in electrical contact with said second conductive layer.

First claim

The invention claimed is:

1. A method, comprising:
depositing a first insulating layer on a first surface of a substrate;
depositing a first conductive layer on the first insulating layer;
selectively removing portions of the first conductive layer to create an opening in the first conductive layer, the opening exposing the first insulating layer;
depositing a second insulating layer on the first conductive layer, on the first insulating layer, and in the opening in the first conductive layer;
forming a trench in the first and second insulating layers and in the opening in the first conductive layer, the trench extending to the substrate, the second insulating layer separating the trench from the first conductive layer;
forming a cathode by depositing a second conductive layer over the trench and on the second insulating layer; and
forming an anode by forming a third conductive layer on a second surface of the substrate.

2. The method according to claim 1 , further comprising:
forming openings in the second insulating layer by selectively removing portions of the second insulating layer; and
depositing a fourth conductive layer on the second conductive layer and in the openings, the fourth conductive layer contacting the first conductive layer and the second conductive layer.

3. The method according to claim 1 wherein forming the trench includes sealing the trench with the second conductive layer, and the trench is a vacuum trench.

4. The method according to claim 1 , further comprising depositing a fourth insulating layer on the sidewalls of the trench.

5. The method according to claim 1 wherein the depositing of the second conductive layer occurs at low temperature so that a speed of depositing is not homogeneous in all directions, with deference in a horizontal direction, the depositing of the second conductive layer forming protuberances from said upper edge which approach towards an inside of the trench, remaining suspended over said trench.

6. The method according to claim 1 wherein the said second conductive layer has a thickness equal to at least a width dimension of the trench.

7. The method according to claim 1 wherein the selectively removing the portions of the first conductive layer includes forming a ring shape structure, and forming the trench inside a hole of said ring shape structure.

8. The method according to claim 1 wherein the substrate is a highly doped semiconductor substrate.

9. A method, comprising:
forming a first insulating layer on a substrate;
forming a first conductive layer on the first insulating layer;
creating a first opening in the first conductive layer;
forming a second insulating layer on the first conductive layer and in the first opening in the first conductive layer;
forming a trench in the first insulating layer, the second insulating layer, and the first opening in the first conductive layer, the trench being spaced from the first conductive layer by the second insulating layer; and
sealing the trench by forming a second conductive layer over the trench.

10. The method of claim 9 , further comprising forming a third insulating layer on the sidewalls of the trench.

11. The method of claim 9 , further comprising:
forming a third insulating layer on the second insulating layer and the second conductive layer;
forming a second opening in the third insulating layer, the second opening overlying the second conductive layer;
forming a third opening in the second insulating layer; and
forming a fourth opening in the third insulating layer, the third and fourth openings overlying the first conductive layer.

12. The method of claim 11 , further comprising forming a third conductive layer on the third insulating layer and in the second, third, and fourth openings.

13. The method of claim 11 wherein the third opening encircles the trench.

14. The method of claim of claim 9 , further comprising forming a third conductive layer on the substrate, the third conductive layer being spaced from the first insulating layer by the substrate.

15. A method, comprising:
forming an anode on a first surface of a substrate;
forming a first insulating layer on a second surface of the substrate;
forming a first conductive layer on the first insulating layer;
forming a second insulating layer on the first insulating layer and the first conductive layer;
forming a trench in the first insulating layer and the second insulating layer;
forming a cathode over an opening of the trench;
forming a second conductive layer, the forming of the second conductive layer including:
forming a first portion of the second conductive layer on the cathode and the second insulating layer; and
forming a second portion of the second conductive layer including a portion extending through the second insulating layer and contacting the first conductive layer.

16. The method of claim 15 wherein the second portion of the second conductive layer is spaced from the trench by the second insulating layer.

17. The method of claim 15 , further comprising:
forming a third insulating layer on the cathode and the second insulating layer; and
forming an opening in the third insulating layer that exposes the cathode.

18. The method of claim 17 wherein the forming of the second conductive layer includes forming the first portion of the second conductive layer on the third insulating layer and in the opening in the third insulating layer.

19. The method of claim 15 , wherein the first portion of the second conductive layer extends in a first direction, and the second portion of the second conductive layer extends in a second direction that is substantially perpendicular to the first direction.

20. The method of claim 15 , further comprising forming a third insulating layer on sidewalls of the trench.

Assignees

• St Microelectronics Srl

Inventors

• Patti Davide Giuseppe
• Grasso Gianleonardo

Classifications

• H01J21/105

  with microengineered cathode and control electrodes, e.g. Spindt-type · CPC title

• H01L29/7827

  Electricity · mapped topic

• H01L29/66969

  Electricity · mapped topic

• H01J21/10 Primary

  with one or more immovable internal control electrodes, e.g. triode, pentode, octode · CPC title

• H01L29/12

  Electricity · mapped topic