Semiconductor device having channel holes

US9853045B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9853045-B2
Application numberUS-201615173888-A
CountryUS
Kind codeB2
Filing dateJun 6, 2016
Priority dateAug 10, 2015
Publication dateDec 26, 2017
Grant dateDec 26, 2017

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A semiconductor device includes a gate stack including gate electrodes stacked vertically on a substrate. Channel holes penetrate through the gate stack to extend vertically to the substrate. Each of the channel holes includes a channel region. First channel pads are each disposed at an end of a respective channel hole opposite the substrate. Each of the first channel pads includes at least one first conductivity-type impurity. Second channel pads are each disposed at an end of a respective channel hole opposite the substrate. Each of the second channel pads includes at least one second conductivity-type impurity.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a gate stack including gate electrodes stacked vertically on a substrate; channel holes penetrating through the gate stack to extend vertically to the substrate, wherein the channel holes include a pair of first channel holes and at least one second channel hole between the pair of first channel holes, wherein each of the channel holes includes a channel region, and wherein the gate electrodes share the pair of first channel holes and the at least one second channel hole; a single horizontal portion disposed below the gate stack, connecting lower portions of the pair of first channel holes and the at least one second hole, and extending horizontally; first channel pads, the pair of first channel holes opposite the substrate; at least one second channel pads disposed at an end of the at least one second channel hole opposite the substrate, wherein portions of the channel region extend from the channel holes to the single horizontal portion to be connected to each other; first interconnection lines connected to the first channel pads; and at least one second interconnection line connected to the at least one second channel pads, wherein the at least one second interconnection line receives an electrical signal different from an electrical signal applied to the first interconnection lines. 2. The semiconductor device of claim 1 , wherein the first and second interconnection lines are disposed at different heights. 3. The semiconductor device of claim 1 , wherein the single horizontal portion has a plate shape extending in a direction along the gate electrodes. 4. The semiconductor device of claim 1 , further comprising insulation layers disposed on both sides of the gate stack, and extending in a direction along the gate stack. 5. The semiconductor device of claim 1 , wherein the gate electrodes comprise a single gate electrode, and wherein the pair of first channel holes and the at least one second channel hole penetrate through the single gate electrode. 6. A semiconductor device, comprising: a gate stack including gate electrodes stacked vertically on a substrate; channel holes penetrating through the gate stack to extend vertically to the substrate, wherein the channel holes include a pair of first channel holes and at least one second channel hole between the pair of first channel holes, wherein each of the channel holes includes a channel region, and wherein the gate electrodes share the pair of first channel holes and the at least one second channel hole; a single horizontal portion disposed below the gate stack, connecting lower portions of the pair of first channel holes and the at least one second hole, and extending horizontally; first channel pads, the pair of first channel holes opposite the substrate; at least one second channel pads disposed at an end of the at least one second channel hole opposite the substrate, wherein portions of the channel region extend from the channel holes to the single horizontal portion to be connected to each other; and a hole connecting portion disposed on sides of two adjacent channel holes of the channel holes to connect the two adjacent channel holes to each other. 7. The semiconductor device of claim 6 , wherein the first and second channel pads are disposed at upper ends of the channel holes connected by the hole connecting portion. 8. The semiconductor device of claim 6 , wherein the hole connecting portion extends horizontally above an upper surface of the substrate between the channel holes. 9. A semiconductor device of claim 1 , comprising: a gate stack including gate electrodes stacked vertically on a substrate; channel holes penetrating through the gate stack to extend vertically to the substrate, wherein the channel holes include a pair of first channel holes and at least one second channel hole between the pair of first channel holes, wherein each of the channel holes includes a channel region, and wherein the gate electrodes share the pair of first channel holes and the at least one second channel hole; a single horizontal portion disposed below the gate stack, connecting lower portions of the pair of first channel holes and the at least one second hole, and extending horizontally; first channel pads, the pair of first channel holes opposite the substrate; and at least one second channel pads disposed at an end of the at least one second channel hole opposite the substrate, wherein portions of the channel region extend from the channel holes to the single horizontal portion to be connected to each other, wherein each of the first channel pads includes at least one first conductivity-type impurity, and wherein each of the second channel pads includes at least one second conductivity-type impurity.

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What does patent US9853045B2 cover?
A semiconductor device includes a gate stack including gate electrodes stacked vertically on a substrate. Channel holes penetrate through the gate stack to extend vertically to the substrate. Each of the channel holes includes a channel region. First channel pads are each disposed at an end of a respective channel hole opposite the substrate. Each of the first channel pads includes at least one…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L27/11582. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 26 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).