Method and arrangement for analyzing a semiconductor element and method for manufacturing a semiconductor component

Patent metadata

Field	Value
Publication number	US-9852955-B2
Application number	US-201615343117-A
Country	US
Kind code	B2
Filing date	Nov 3, 2016
Priority date	Nov 11, 2015
Publication date	Dec 26, 2017
Grant date	Dec 26, 2017

Abstract

According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.

First claim

The invention claimed is:

1. A method for analyzing a semiconductor element comprising polymer residues located on a surface, the method comprising
marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance, wherein the exposing comprises exposing the semiconductor element to a mixture containing the fluorescent substance and carbon dioxide; and
detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.

2. The method according to claim 1 , wherein for the marking the semiconductor element is exposed to the fluorescent substance until the fluorescent substance is affixed or attached to at least the fraction of the residues.

3. The method according to claim 1 , wherein the mixture contains the carbon dioxide in its liquid phase.

4. The method according to claim 1 , wherein the mixture contains the carbon dioxide in its supercritical phase.

5. The method according to claim 1 , further comprising
placing the semiconductor element in a pressure chamber; and
supplying the mixture to the pressure chamber or supplying the carbon dioxide and the fluorescent substance to the pressure chamber.

6. The method according to claim 5 , further comprising transferring the mixture to its liquid phase or to its supercritical phase.

7. The method according to claim 6 , comprising increasing a pressure and/or a temperature inside the pressure chamber for the transferring.

8. The method according to claim 2 , wherein the visualizing the marked residues using fluorescence microscopy comprises
illuminating at least a part of the semiconductor element with electromagnetic radiation;
detecting fluorescent electromagnetic radiation being emitted by the affixed or attached fluorescent substance as a response to the illumination.

9. The method according to claim 8 , wherein the illuminating of the at least a part of the semiconductor element and the detection of the fluorescent electromagnetic radiation are repeated for different focus levels and the method further comprises merging images corresponding to the different focus levels.

10. The method according to claim 9 , wherein the different focus levels correspond to different depths of a surface structure or a through-semiconductor-via.

11. The method according to claim 9 further comprising generating a three-dimensional fluorescence image of the illuminated part of the semiconductor element by the merging.

12. The method according to claim 1 , wherein the semiconductor element comprises at least one surface structure and the residues located on the surface of the semiconductor element are located on a surface of the at least one surface structure.

13. The method according to claim 12 , wherein the at least one surface structure comprises at least one of the following: a through-semiconductor-via, TSV, a trench, a cavity.

14. The method according to claim 12 , wherein the at least one surface structure comprises a TSV and the residues are located on a sidewall and/or a bottom wall of the TSV.

15. The method according to claim 1 , wherein the semiconductor element is a semiconductor wafer or a semiconductor die.

16. The method according to claim 1 , wherein the residues comprise a fluoropolymer and/or an acrylic polymer.

17. A method for manufacturing a semiconductor component comprising
processing a surface of a semiconductor element, wherein a polymer material is utilized or generated;
analyzing the semiconductor element comprising polymer residues originating from the polymer material by employing a method according to claim 1 .

18. The method according to claim 17 , wherein
the step of processing the surface of the semiconductor element comprises generating a surface structure or a TSV using a deep-reactive ion etching, DRIE, process;
the DRIE process comprises depositing a polymer layer as a passivation layer for preventing from lateral etching; and
the polymer residues located on the surface of the semiconductor element origin at least partially from the polymer layer or from the polymer layer being incompletely removed.

19. The method according to claim 18 , wherein the polymer layer comprises a fluoropolymer and/or an acrylic polymer.

20. The method according to claim 18 , further comprising a cleaning step to remove the polymer layer, wherein the polymer residues remain on a surface of the surface due to an incomplete removal by the cleaning step.

21. The method according to claim 17 , wherein
the step of processing the surface of the semiconductor element comprises a layer deposition process or a layer structuring process;
the polymer residues located on the surface of the semiconductor element are generated at least partially during the layer deposition process or the layer structuring process.

Assignees

• Ams Ag

Inventors

• Gehles Helene
• Bodner Thomas
• Siegert Joerg

Classifications

• H10P74/235

  comprising optical enhancement of defects or not-directly-visible states · CPC title

• H10P74/20

  characterised by the properties tested or measured, e.g. structural or electrical properties · CPC title

• H10P70/20

  Cleaning during device manufacture · CPC title

• H10P50/242

  of Group IV materials · CPC title

• H10W20/023

  the interconnections being through-semiconductor vias · CPC title