Silicon nitride film, and semiconductor device

US9847355B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9847355-B2
Application numberUS-201414515770-A
CountryUS
Kind codeB2
Filing dateOct 16, 2014
Priority dateMay 17, 2002
Publication dateDec 19, 2017
Grant dateDec 19, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 μm in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×10 21 /cm 3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH 4 HF 2 ) of 7.13% and an ammonium fluoride (NH 4 F) of 15.4%.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a transistor comprising a semiconductor film; a first insulating film over the transistor, the first insulating film having a flattened surface irrespective of a step caused by the transistor; a first wiring over the first insulating film, the first wiring including a metal selected from Al, Ti, Mo, and W and passing through the first insulating film so as to be electrically connected to the semiconductor film; a first barrier film in direct contact with a top surface of the first wiring; a second insulating film over the first barrier film; a second barrier film on the second insulating film, wherein the second insulating film and the second barrier film comprise a first opening reaching the first wiring; a third insulating film over the second barrier film, wherein the third insulating film comprises a second opening wider than and overlapping with the first opening; a tantalum nitride film coating an inner wall of the first opening and an inner wall of the second opening; a second wiring filled in the first opening and the second opening with the tantalum nitride film, the second wiring including copper; and a third barrier film in direct contact with a top surface of the second wiring. 2. The semiconductor device according to claim 1 , wherein the first barrier film is further in direct contact with a part of a top side surface of the first wiring. 3. The semiconductor device according to claim 1 , wherein each of the first barrier film, the second barrier film, and the third barrier film comprises silicon nitride. 4. The semiconductor device according to claim 1 , wherein the transistor comprises a gate electrode including copper. 5. A display device comprising the semiconductor device according to claim 1 . 6. An electronic apparatus comprising: a display portion including the display device according to claim 5 . 7. A semiconductor device comprising: a transistor comprising: a gate electrode which includes a first conductive film and a second conductive film over the first conductive film; and a semiconductor film with a gate insulating film interposed between the gate electrode and the semiconductor film; a first insulating film over the transistor, the first insulating film having a flattened surface irrespective of a step caused by the transistor; a first wiring over the first insulating film, the first wiring including a metal selected from Al, Ti, Mo, and W and passing through the first insulating film so as to be electrically connected to the semiconductor film; a first barrier film in direct contact with a top surface of the first wiring; a second insulating film over the first barrier film; a second barrier film on the second insulating film, wherein the second insulating film and the second barrier film comprise a first opening reaching the first wiring; a third insulating film over the second barrier film, wherein the third insulating film comprises a second opening wider than and overlapping with the first opening; a tantalum nitride film coating an inner wall of the first opening and an inner wall of the second opening; a second wiring filled in the first opening and the second opening with the tantalum nitride film, the second wiring including copper; and a third barrier film in direct contact with a a top surface of the second wiring, wherein the first conductive film protrudes horizontally from a bottom of the second conductive film. 8. The semiconductor device according to claim 7 , wherein the first barrier film is further in direct contact with a side surface of the first wiring. 9. The semiconductor device according to claim 7 , wherein each of the first barrier film, the second barrier film, and the third barrier film comprises silicon nitride. 10. The semiconductor device according to claim 7 , wherein the second conductive film comprises copper. 11. A semiconductor device comprising: a transistor; a first insulating film over the transistor, the first insulating film having a flattened surface irrespective of a step caused by the transistor; a first wiring over the first insulating film, the first wiring including a metal selected from Al, Ti, Mo, and W and passing through the first insulating film so as to be electrically connected to the transistor; a first barrier film in direct contact with a top surface of the first wiring; a second insulating film over the first barrier film; a second barrier film on the second insulating film, wherein the second insulating film and the second barrier film comprise a first opening reaching the first wiring; a third insulating film over the second barrier film, wherein the third insulating film comprises a second opening wider than and overlapping with the first opening; a tantalum nitride film coating an inner wall of the first opening and an inner wall of the second opening; a second wiring filled in the first opening and the second opening with the tantalum nitride film, the second wiring including copper; and a third barrier film in direct contact with a top surface of the second wiring. 12. The semiconductor device according to claim 11 , wherein the first barrier film is further in direct contact with a side surface of the first wiring. 13. The semiconductor device according to claim 11 , wherein each of the first barrier film, the second barrier film, and the third barrier film comprises silicon nitride. 14. The semiconductor device according to claim 11 , wherein the transistor comprises a gate electrode including copper. 15. A display device comprising the semiconductor device according to claim 11 . 16. An electronic apparatus comprising: a display portion including the display device according to claim 15 .

Assignees

Inventors

Classifications

  • the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

  • in the presence of a plasma [PECVD] · CPC title

  • using physical ablation of a target, e.g. physical vapour deposition or pulsed laser deposition · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

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What does patent US9847355B2 cover?
An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification B32B17/04. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Dec 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).