Tranmission line bridge interconnects

US9842813B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9842813-B2
Application numberUS-201514860565-A
CountryUS
Kind codeB2
Filing dateSep 21, 2015
Priority dateSep 21, 2015
Publication dateDec 12, 2017
Grant dateDec 12, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one embodiment, an integrated circuit package includes a package substrate, a printed circuit board, an interposer structure and a transmission line bridge interconnect within the interposer. The interposer structure, which includes multiple interposer layers, may be formed on a top surface of the package substrate. The printed circuit board may be coupled to the package substrate through the transmission line bridge interconnect. The transmission line may be formed on at least one of the interposer layers. The transmission line may be utilized to convey signals between the package substrate and the printed circuit board. The transmission line may be a stripline transmission line or a micro-strip transmission line. The transmission line may have a low parasitic inductance and implementation of the transmission line does not introduce large dimensional discontinuity throughout that signal pathway. The integrated circuit package may be part of a circuit system that includes external circuits.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit package, comprising: a package substrate; an interposer structure formed over a top surface of the package substrate and a top surface of a printed circuit board, wherein the interposer structure comprises a plurality of interposer layers; and a first transmission line formed on at least one of the plurality of interposer layers, wherein the first transmission line conveys signals between the package substrate and the printed circuit board; and a second transmission line formed on the printed circuit board, wherein the first transmission line partially overlaps the second transmission line and the signals are transmitted between the first transmission line and the second transmission line. 2. The integrated circuit package defined in claim 1 , wherein the transmission line comprises a transmission line selected from the group consisting of: a micro-strip transmission line and a stripline transmission line. 3. The integrated circuit package defined in claim 1 , further comprising: an additional transmission line formed on the at least one of the plurality of interposer layers, wherein the transmission line transmits a first signal from the package substrate to the printed circuit board and wherein the additional transmission line transmits a second signal from the printed circuit board to the package substrate. 4. The integrated circuit package defined in claim 3 , wherein the first signal transmitted from the package substrate comprises a signal selected from the group consisting of: a single-ended signal and a differential signal. 5. The integrated circuit package defined in claim 1 , wherein a characteristic impedance of the transmission line is at least 50 Ohm. 6. The integrated circuit package defined in claim 1 , wherein the interposer structure has an edge with a plurality of steps, wherein a respective transmission line is formed on each of the steps of the plurality of steps. 7. The integrated circuit package defined in claim 1 , wherein the signals comprise signals selected from the group consisting of: input-output signals, radio-frequency data signals, power signals, and ground signals. 8. The integrated circuit package defined in claim 1 , further comprising: an integrated circuit die formed on the package substrate, wherein the interposer structure surrounds the integrated circuit die. 9. The integrated circuit package defined in claim 1 , wherein the transmission line is a first transmission line, the package substrate includes a second transmission line, the printed circuit board includes a third transmission line, and the first transmission line is coupled between the second transmission line and the third transmission line. 10. The integrated circuit package defined in claim 1 , wherein the transmission line bridges a gap between the package substrate and the printed circuit board. 11. A system, comprising: an integrated circuit die; a substrate, wherein the integrated circuit die is mounted on a top surface of the substrate; an interposer formed above the substrate that at least partially surrounds the integrated circuit die; a printed circuit board, the printed circuit board comprising a cavity, wherein the substrate is formed within the cavity; and a transmission line formed within the interposer, wherein the transmission line transmits a signal between the integrated circuit die and the printed circuit board, the printed circuit board further comprises an additional transmission line at a surface of the printed circuit board that faces the interposer, and the transmission line on the interposer partially overlaps the additional transmission line on the printed circuit board so that the signal is transmitted between the additional transmission line on the printed circuit board and the transmission line on the interposer. 12. The system defined in claim 11 , wherein the transmission line comprises a transmission line selected from the group consisting of: a micro-strip transmission line and a stripline transmission line. 13. The system defined in claim 11 , wherein the transmission line is a first transmission line and the additional transmission line is a second transmission line, the system further comprising: a third transmission line formed within the interposer, wherein the third transmission line transmits an additional signal between the integrated circuit die and the printed circuit board and the first transmission line is formed in a first plane within the interposer and the third transmission line is formed in a second plane that is different from the first plane within the interposer. 14. The system defined in claim 11 , wherein the signal transmitted by the transmission line comprises a signal selected from the group consisting of: a single-ended signal and a differential signal. 15. The system defined in claim 11 , wherein edges of the substrate and edges of the interposer each comprise a plurality of step-shaped structures, wherein each of the step-shaped structures includes at least one corresponding transmission line. 16. An apparatus, comprising: a printed circuit board having a cavity and a first top surface; a package substrate formed within the cavity of the printed circuit board, wherein the package substrate is soldered to the printed circuit board and the package substrate has a second top surface; an interposer having a first portion that overlaps the second top surface without overlapping the first top surface and a second portion that overlaps the first top surface without overlapping the second top surface and a conductive line formed at the first top that conveys signals between the package substrate and the printed circuit board. 17. The apparatus defined in claim 16 , further comprising: an integrated circuit die mounted to the second top surface, wherein the conductive line formed at the first top surface conveys the signals between the integrated circuit die and the printed circuit board. 18. The apparatus defined in claim 17 , further comprising: an additional conductive line formed at a bottom surface of the interposer, wherein the bottom surface of the interposer is formed adjacent to the first top surface and the second top surface and the conductive line and the additional conductive line convey the signals between the integrated circuit die and the printed circuit board. 19. The apparatus defined in claim 18 , wherein the conductive line comprises a first radio-frequency transmission line and the additional conductive line comprises a second radio-frequency transmission line. 20. The apparatus defined in claim 17 , wherein the integrated circuit die transmits signals to the printed circuit board over the conductive line at a data rate greater than 25 gigabits per second. 21. The apparatus defined in claim 18 , wherein a first end of the additional conductive line is electrically coupled to a first conductive pad on the second top surface and a second end of the additional conductive line is coupled to a second conductive pad on the first top surface. 22. The apparatus defined in claim 16 , further comprising: an additional conductive line formed adjacent to the conductive line formed at the first top surface, wherein the conductive line and the additional conductive line comprise transmission lines that transmit differential signals.

Assignees

Inventors

Classifications

  • Vias, e.g. via plugs · CPC title

  • Bump connectors and die-attach connectors · CPC title

  • Waveguides, e.g. strip lines · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

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Frequently asked questions

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What does patent US9842813B2 cover?
In one embodiment, an integrated circuit package includes a package substrate, a printed circuit board, an interposer structure and a transmission line bridge interconnect within the interposer. The interposer structure, which includes multiple interposer layers, may be formed on a top surface of the package substrate. The printed circuit board may be coupled to the package substrate through th…
Who is the assignee on this patent?
Altera Corp
What technology area does this patent fall under?
Primary CPC classification H10W44/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).