Transceiver and interface for IC package

Patent metadata

Field	Value
Publication number	US-9841572-B2
Application number	US-201615181762-A
Country	US
Kind code	B2
Filing date	Jun 14, 2016
Priority date	Jul 1, 2011
Publication date	Dec 12, 2017
Grant date	Dec 12, 2017

Abstract

An interconnect system includes a first circuit board, first and second connectors connected to the first circuit board, and a transceiver including an optical engine and arranged to receive and transmit electrical and optical signals through a cable, to convert optical signals received from the cable into electrical signals, and to convert electrical signals received from the first connector into optical signals to be transmitted through the cable. The transceiver is arranged to mate with the first and second connectors so that at least some converted electrical signals are transmitted to the first connector and so that at least some electrical signals received from the cable are transmitted to the second connector.

First claim

What is claimed is:

1. A two-connector system for connecting a transceiver to a circuit board, the two-connector system comprising:
first and second connectors each configured to be connected to the circuit board; wherein
the first and second connectors simultaneously mate and unmate with the transceiver; and
when connected to the transceiver, the first connector transmits and/or receives high-speed signals, and the second connector transmits and/or receives low-speed signals with a speed lower than the high-speed signals.

2. The two-connector system of claim 1 , wherein the first connector is an edge card connector.

3. The two-connector system of claim 1 , wherein the first connector receives an edge of a transceiver circuit board when the transceiver is mated with the first and second connectors.

4. The two-connector system of claim 3 , wherein the first connector includes top contacts that engage a top surface of the transceiver circuit board when the transceiver is mated with the first and second connectors.

5. The two-connector system of claim 3 , wherein the first connector includes bottom contacts that engage a bottom surface of the transceiver circuit board when the transceiver is mated with the first and second connectors.

6. The two-connector system of claim 1 , wherein the first connector includes contacts having a 0.5-mm pitch.

7. The two-connector system of claim 1 , wherein the second connector is a compression connector.

8. The two-connector system of claim 1 , wherein the second connector includes contacts arranged to engage a surface of a transceiver circuit board spaced away from an edge of the transceiver circuit board when the transceiver is mated with the first and second connectors.

9. The two-connector system of claim 1 , wherein the second connector includes contacts having a 0.8-mm pitch.

10. The two-connector system of claim 1 , further comprising a circuit board to which the first and second connectors are connected.

11. A two-connector system for connecting a transceiver to a circuit board, the two-connector system comprising:
first and second connectors connected to the circuit board; wherein
the first and second connectors simultaneously mate and unmate with the transceiver; and
the first connector includes first contacts with a first pitch;
the second connector includes second contacts with a second pitch different than the first pitch.

12. The two-connector system of claim 11 , wherein the first pitch is 0.5-mm.

13. The two-connector system of claim 11 , wherein the second pitch is 0.8-mm.

14. The two-connector system of claim 11 , wherein, when connected to the transceiver, the first connector transmits and/or receives high-speed signals, and the second connector transmits and/or receives low-speed signals with a speed lower than the high-speed signals.

15. The two-connector system of claim 1 , wherein the first connector is an edge card connector, and the second connector is a compression connector.

16. A two-connector system for connecting a transceiver to a circuit board, the two-connector system comprising:
a first connector including first contacts and configured to be connected to the circuit board;
a second connector including second contacts and configured to be connected to the circuit board; wherein
the first and second connectors simultaneously mate and unmate with the transceiver; and
when the transceiver is mated with the first and second connectors, the first contacts engage an edge of a transceiver circuit board, and the second contacts engage a surface of the transceiver circuit board spaced away from the edge of the transceiver circuit board.

17. The two-connector system of claim 16 , wherein the first contacts have a 0.5-mm pitch.

18. The two-connector system of claim 16 , wherein the second contacts have a 0.8-mm pitch.

19. The two-connector system of claim 16 , wherein, when connected to the transceiver, the first connector transmits and/or receives high-speed signals, and the second connector transmits and/or receives low-speed signals with a speed lower than the high-speed signals.

20. The two-connector system of claim 16 , wherein the first connector is an edge card connector, and the second connector is a compression connector.

21. A footprint for connecting a transceiver to a circuit board, the footprint comprising:
first lands configured on the circuit board to be connected to a first connector; and
second lands configured on the circuit board to be connected to a second connector; wherein
the first and second lands are configured such that a transceiver simultaneously mates and unmates with the first and second connectors; and
the first lands transmit and/or receive high-speed signals, and the second lands transmit and/or receive low-speed signals with a speed lower than the high-speed signals.

22. A footprint for connecting a transceiver to a circuit board, the footprint comprising:
first lands configured on the circuit board to be connected to a first connector; and
second lands configured on the circuit board to be connected to a second connector; wherein
the first and second lands are configured such that a transceiver simultaneously mates and unmates with the first and second connectors;
the first lands have a first pitch; and
the second lands have a second pitch different than the first pitch.

23. The footprint of claim 22 , wherein the first lands have a 0.5-mm pitch.

24. The footprint of claim 22 , wherein the second lands have a 0.8-mm pitch.

Assignees

• Samtec Inc

Inventors

• Zbinden Eric
• Musser Randall
• Verdiell Jean-Marc André
• Mongold John
• Vicich Brian
• Guetig Keith

Classifications

• H10W72/5445

  being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title

• H01R12/716

  Coupling device provided on the PCB · CPC title

• G02B6/4232 Primary

  using the surface tension of fluid solder to align the elements, e.g. solder bump techniques (flip-chip mounting techniques in assembly of semiconductor devices H10W72/072) · CPC title

• G02B6/4293

  hybrid electrical and optical connections for transmitting electrical and optical signals · CPC title

• G02B6/4249

  comprising arrays of active devices and fibres · CPC title