Display device using semiconductor light emitting device and method for manufacturing the same

US9831222B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9831222-B2
Application numberUS-201615140339-A
CountryUS
Kind codeB2
Filing dateApr 27, 2016
Priority dateOct 26, 2015
Publication dateNov 28, 2017
Grant dateNov 28, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device including a substrate; a first electrode on the substrate; and a plurality of semiconductor light emitting devices disposed on the first electrode; and a second electrode. Further, at least one of the semiconductor light emitting devices includes a first conductive semiconductor layer; a second conductive semiconductor layer overlapping with the first conductive semiconductor layer; and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer. In addition, an upper surface of the second conductive layer includes a recess groove having a bottom portion and a lateral wall portion formed along an edge of the second conductive semiconductor layer, and the second electrode extends partially on the bottom portion of the groove and on the lateral wall portion.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device, comprising: a substrate; a first electrode on the substrate; a plurality of semiconductor light emitting devices disposed on the first electrode; and a second electrode, wherein at least one of the semiconductor light emitting devices comprises: a first conductive semiconductor layer; a second conductive semiconductor layer overlapping with the first conductive semiconductor layer; and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein an upper surface of the second conductive semiconductor layer includes a recess groove having a bottom portion and a lateral wall portion formed along an edge of the second conductive semiconductor layer, wherein the second electrode extends partially on the bottom portion of the groove and on the lateral wall portion, wherein the second electrode comprises a wiring electrode being directly connected to the second conductive semiconductor layer and extending to electrically connect adjoining semiconductor light emitting devices in left and right directions, wherein the lateral wall portion includes a first pair of lateral walls in parallel to each other, and the wiring electrode is configured to cover either one of the first pair of lateral walls but does not cover the other one thereof, and wherein the lateral wall portion further includes a second pair of lateral walls in parallel to each other and the wiring electrode is configured to cover only a portion of the second pair of lateral walls. 2. The display device of claim 1 , wherein the second pair of lateral walls comprises a first lateral wall and a second lateral wall, and wherein the wiring electrode forms a line sequentially passing through the first lateral wall, the bottom and the second lateral wall. 3. The display device of claim 2 , wherein a height of the lateral wall portion is 10 to 20 percent of either one length of the pair of lateral walls or 25 to 35 percent of a length of a portion on which the first lateral wall overlaps with the wiring electrode. 4. The display device of claim 1 , wherein the first conductive semiconductor layer is a p-type GaN layer, the second conductive semiconductor layer is an n-type GaN layer, and the recess groove includes an etched portion of at least part of the n-type GaN layer. 5. The display device of claim 4 , further comprising: a front surface configured to display visual information, wherein the n-type GaN layer is disposed closer to the front surface than the p-type GaN layer. 6. The display device of claim 1 , wherein the at least one of the semiconductor light emitting devices further comprises an undoped semiconductor layer formed to cover the second conductive semiconductor layer, and wherein the recess groove is recessed toward the first conductive semiconductor layer on one surface of the undoped semiconductor layer. 7. The display device of claim 6 , wherein the bottom portion is formed on the second conductive semiconductor layer, and the lateral wall portion is formed on the second conductive semiconductor layer and the undoped semiconductor layer. 8. The display device of claim 6 , wherein the wiring electrode extends from one surface of the undoped semiconductor layer to the recess groove. 9. The display device of claim 1 , wherein the bottom portion of the recess groove includes an uneven surface. 10. The display device of claim 9 , wherein the uneven surface is formed on at least part of the lateral wall portion, and a size of the uneven surface of the lateral wall portion is smaller than that of the uneven surface of the bottom portion. 11. The display device of claim 1 , wherein the lateral wall portion is inclined with respect to a direction perpendicular to the bottom portion. 12. The display device of claim 11 , wherein a cross-sectional area of the recess groove increases as it is located farther from the first conductive semiconductor layer by the inclination of the lateral wall portion.

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What does patent US9831222B2 cover?
A display device including a substrate; a first electrode on the substrate; and a plurality of semiconductor light emitting devices disposed on the first electrode; and a second electrode. Further, at least one of the semiconductor light emitting devices includes a first conductive semiconductor layer; a second conductive semiconductor layer overlapping with the first conductive semiconductor l…
Who is the assignee on this patent?
Lg Electronics Inc
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).