Package substrate, package structure including the same, and their fabrication methods

US9824964B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9824964-B2
Application numberUS-201715624855-A
CountryUS
Kind codeB2
Filing dateJun 16, 2017
Priority dateMar 6, 2015
Publication dateNov 21, 2017
Grant dateNov 21, 2017

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

This disclosure provides a package substrate, a package structure including the same and their fabrication methods. The package substrate comprises: a first wiring layer having a first metal wire and a first dielectric material layer surrounding the first metal wire; a conductive pillar layer formed on the first wiring layer and including a first metal pillar connected to the first metal wire and a molding compound layer surrounding the first metal pillar; a flexible material layer formed on the conductive pillar layer and including a first opening formed on the first metal pillar and exposing the first metal pillar; and a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the first metal pillar through the first opening, a second metal pillar formed on the second metal wire, and a protective layer surrounding the second metal wire and the second metal pillar.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for fabricating a package structure, comprising the steps of: (A) providing a carrier; (B) forming a metal wiring layer on the carrier, and patterning the metal wiring layer to form a first metal wire; (C) forming a first dielectric material layer on the carrier while enabling the first metal wire to be exposed; (D) forming a metal pillar on the first dielectric material layer, so that the metal pillar is electrically connected to the first metal wire; (E) forming a molding compound layer on the first dielectric material layer while enabling an upper surface of the metal pillar to be exposed; (F) forming a flexible material layer on the molding compound layer while enabling the upper surface of the metal pillar to be exposed, wherein the flexible material layer has a surface area larger than that of the molding compound layer so that the flexible material layer has an extension part extending from the molding compound layer without covering the first metal wire; (G) forming a second metal wire on the flexible material layer and on the upper surface of the metal pillar, so that the second metal wire is connected to the metal pillar; and (H) forming a protective layer to cover the flexible material layer and the second metal wire, and forming an opening to expose the second metal wire. 2. The method of claim 1 , further comprising a step of: disposing an electronic device on the protective layer and electrically connecting the electronic device with the second metal wire through the opening of the protective layer. 3. The method of claim 1 , wherein the flexible material layer comprises polyimide, polyethylene naphthalate (PEN), or liquid crystal plastic. 4. A method for fabricating a package structure, comprising the steps of: (A) providing a carrier; (B) forming a metal wiring layer on the carrier, and patterning the metal wiring layer to form a first metal wire; (C) forming a first dielectric material layer on the carrier while enabling the first metal wire to be exposed; (D) forming a metal pillar on the first dielectric material layer, so that the metal pillar is electrically connected to the first metal wire; (E) forming a molding compound layer on the first dielectric material layer while enabling an upper surface of the metal pillar to be exposed; (F) forming a flexible material layer on the molding compound layer while enabling the upper surface of the metal pillar to be exposed, wherein the flexible material layer has a surface area larger than that of the molding compound layer so that the flexible material layer has an extension part extending from the molding compound layer without covering the first metal wire; (G) forming a second metal wire on the flexible material layer and on the upper surface of the metal pillar, so that the second metal wire is connected to the metal pillar; (H) forming a protective layer to cover the flexible material layer and the second metal wire, and forming an opening to expose the second metal wire; and (I) electrically connecting a multilayer capacitor to the first metal wire. 5. The method of claim 4 , further comprising a step of: disposing an electronic device on the protective layer and electrically connecting the electronic device with the second metal wire through the opening of the protective layer. 6. The method of claim 4 , wherein the flexible material layer comprises polyimide, polyethylene naphthalate (PEN), or liquid crystal plastic.

Assignees

Inventors

Classifications

  • comprising multiple insulating layers · CPC title

  • Through-vias · CPC title

  • on or in insulating or insulated package substrates, interposers, or redistribution layers · CPC title

  • H10W70/688Primary

    Flexible insulating substrates · CPC title

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US9824964B2 cover?
This disclosure provides a package substrate, a package structure including the same and their fabrication methods. The package substrate comprises: a first wiring layer having a first metal wire and a first dielectric material layer surrounding the first metal wire; a conductive pillar layer formed on the first wiring layer and including a first metal pillar connected to the first metal wire a…
Who is the assignee on this patent?
Phoenix Pioneer Technology Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W70/688. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).