Method and apparatus for controlling spatial temperature distribution

Patent metadata

Field	Value
Publication number	US-9824904-B2
Application number	US-201514594648-A
Country	US
Kind code	B2
Filing date	Jan 12, 2015
Priority date	Apr 30, 2001
Publication date	Nov 21, 2017
Grant date	Nov 21, 2017

Abstract

A chuck for a plasma processor comprises a temperature-controlled base, a thermal insulator, a flat support, and a heater. The temperature-controlled base is controlled in operation a temperature below the desired temperature of a workpiece. The thermal insulator is disposed over at least a portion of the temperature-controlled base. The flat support holds a workpiece and is disposed over the thermal insulator. A heater is embedded within the flat support and/or mounted to an underside of the flat support. The heater includes a plurality of heating elements that heat a plurality of corresponding heating zones. The power supplied and/or temperature of each heating element is controlled independently. The heater and flat support have a combined temperature rate change of at least 1° C. per second.

First claim

What is claimed is:

1. A chuck for a plasma processor comprising:
a temperature-controlled base having a fluid circulation passage therein adapted to maintain the base at a constant temperature;
a layer of thermal insulation material disposed over said base adapted to provide thermal impedance and RF coupling between the base and plasma in the plasma processor during processing of a semiconductor substrate;
an electrostatic chucking (ESC) layer disposed over said layer of thermal insulation material, the ESC layer adapted to support a semiconductor substrate during processing in a plasma processor;
a heater coupled to an underside of said ESC layer, said heater including a plurality of planar heating elements corresponding to a plurality of heating regions in said ESC layer adapted to provide spatial temperature control of a semiconductor substrate during processing thereof; and
a heat exchange system configured to maintain the temperature-controlled base at the constant temperature, wherein the constant temperature is selected to be a predetermined amount below a desired temperature of the semiconductor substrate based on Q 1 , Q 2 , and Q 3 , wherein Q 1 corresponds to incoming plasma heat flux to the semiconductor substrate, Q 2 corresponds to heat flux exiting the ESC layer and the layer of thermal insulation material into the temperature-controlled base, and Q 3 corresponds to heat flux generated by the heater.

2. The chuck of claim 1 wherein each planar heating element is adapted to be powered independently.

3. The chuck of claim 1 wherein said temperature-controlled base is adapted to be maintained at a constant temperature of less than 20° C. when a semiconductor substrate is processed in the plasma processor.

4. The chuck of claim 1 further comprising a plurality of sensors corresponding with said plurality of heating regions, each sensor adapted to measure and send a signal representative of the temperature of its corresponding heating region.

5. A plasma processor including the chuck of claim 4 and a controller configured to receive signals from the sensors and adjust power supplied to each planar heating element based on a set point for each heating region.

6. The chuck of claim 1 wherein each planar heating element is an electrically resistive heater.

7. The chuck of claim 1 wherein each planar heating element is a thermoelectric module.

8. The chuck of claim 1 , wherein the planar heaters are embedded in a ceramic layer.

9. The chuck of claim 1 , wherein the constant temperature is selected such that Q 2 is equal to half of a maximum of Q 3 when Q 1 =0.

10. A chuck for a plasma processor comprising:
a temperature-controlled baseplate;
a layer of thermal insulation material disposed over said base adapted to provide RF coupling between the base and plasma in the plasma processor during processing of a semiconductor substrate;
an electrostatic chucking (ESC) layer disposed over said layer of thermal insulation material, the ESC layer adapted to support a semiconductor substrate during processing in a plasma processor;
a heater beneath said ESC layer, said heater including a plurality of planar heating elements corresponding to a plurality of heating regions in said ESC layer adapted to provide spatial temperature control of a semiconductor substrate during processing thereof; and
a heat exchange system configured to maintain the temperature-controlled base at a constant temperature, wherein the constant temperature is selected to be a predetermined amount below a desired temperature of the semiconductor substrate based on Q 1 , Q 2 , and Q 3 , wherein Q 1 corresponds to incoming plasma heat flux to the semiconductor substrate, Q 2 corresponds to heat flux exiting the ESC layer and the layer of thermal insulation material into the temperature-controlled base, and Q 3 corresponds to heat flux generated by the heater.

11. The chuck of claim 10 wherein each planar heating element is adapted to be powered independently.

12. The chuck of claim 10 wherein said temperature-controlled baseplate is adapted to be maintained at a constant temperature when a semiconductor substrate is processed in the plasma processor.

13. The chuck of claim 10 further comprising a plurality of sensors corresponding with said plurality of heating regions, each sensor adapted to measure the temperature of its corresponding heating region.

14. A plasma processor including the chuck of claim 13 and a controller configured to receive signals from the sensors and adjust power supplied to each planar heating element based on a set point for each heating region.

15. The chuck of claim 10 wherein each planar heating element is an electrically resistive heater.

16. The chuck of claim 10 wherein each planar heating element is a thermoelectric module.

17. The chuck of claim 10 , wherein the planar heaters are embedded in a ceramic layer.

18. The chuck of claim 10 , wherein the constant temperature is selected such that Q 2 is equal to half of a maximum of Q 3 when Q 1 =0.

Assignees

• Lam Res Corp

Inventors

• Benjamin Neil
• Steger Robert

Classifications

• H10P72/7604

  the wafers being placed on a susceptor, stage or support · CPC title

• H10P72/722

  Details of electrostatic chucks · CPC title

• H10P72/0432

  mainly by conduction · CPC title

• H10P72/0421

  for drying etching · CPC title

• H10P72/0602 Primary

  Temperature monitoring · CPC title