Electronic device comprising an encapsulating block locally of smaller thickness

US9818664B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9818664-B2
Application numberUS-201615240482-A
CountryUS
Kind codeB2
Filing dateAug 18, 2016
Priority dateFeb 26, 2016
Publication dateNov 14, 2017
Grant dateNov 14, 2017

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic device includes a carrier substrate with at least one electronic-circuit chip mounted on a front face of the carrier substrate. An encapsulation block on the front face and embedding the electronic-circuit chip has a periphery with corners. The encapsulating block further has, in at least one local zone located in at least one corner and from the front face of the carrier substrate, a smaller thickness than a thickness of the encapsulation block at least in a surrounding zone. The electronic device is manufactured by a process in which the zone of smaller thickness is obtained by molding or by machining.

First claim

Opening claim text (preview).

The invention claimed is: 1. An electronic device, comprising: a carrier substrate, at least one integrated-circuit chip mounted on a front face of the carrier substrate, and a molded encapsulating block on the front face and in which said integrated-circuit chip is embedded, a periphery of said encapsulation block having corners, wherein the molded encapsulating block has, in at least one molded local zone located in at least one corner and from the front face of the carrier substrate, a smaller thickness than a thickness of the molded encapsulation block at least in a surrounding zone; and wherein said local zone having the smaller thickness is bounded by a front void in the molded encapsulating block separated from said surrounding zone by a shoulder. 2. The device according to claim 1 , wherein said molded local zone having the smaller thickness extends as far as an edge of the molded encapsulating block. 3. The device according to claim 1 , wherein said molded local zone having the smaller thickness extends to an exterior of a zone in which said integrated-circuit chip is located. 4. The device according to claim 1 , wherein the carrier substrate includes exterior electrical connection elements on a back face opposite said front face, wherein certain ones of the exterior electrical connection elements are positioned in at least one back zone opposite, in a thickness direction of the carrier substrate, said molded local zone having the smaller thickness. 5. The device according to claim 1 , wherein the smaller thickness of the molded encapsulating block, in said molded local zone, comprises between ten and fifty percent of a thickness of the molded encapsulating block in the surrounding zone. 6. The device according to claim 1 , wherein a thickness of the molded local zone having the smaller thickness is between ten and fifty percent of an overall maximum thickness of the block of material. 7. The device according to claim 1 , wherein the carrier substrate includes two peripheral rows of exterior electrical connection elements on a back face opposite said front face, wherein at least a portion of the two peripheral rows of the exterior electrical connection elements are positioned in at least one back zone opposite, in a thickness direction of the carrier substrate, said molded local zone having the smaller thickness. 8. An electronic device, comprising: a carrier substrate, an integrated-circuit chip mounted on a front face of the carrier substrate, and a molded block of material encapsulating the integrated-circuit chip on the front face, said molded block of material having a top surface and a peripheral side wall including a plurality of corners, wherein a thickness of the block of material is molded to be thinner at the peripheral side wall at each corner than at the peripheral side wall located between adjacent corners; and wherein said thinner thickness of the molded block of material defines a local zone that is bounded by a void in the top surface of the molded block of material, said void delimited by a shoulder. 9. The device according to claim 8 , wherein said local zone having the thinner thickness extends inwardly from the peripheral side wall. 10. The device according to claim 8 , wherein said shoulder of local zone having the thinner thickness is positioned exterior of an outer perimeter of said integrated-circuit chip. 11. The device according to claim 8 , wherein the carrier substrate includes exterior electrical connection elements on a back face opposite said front face, wherein certain ones of the exterior electrical connection elements are positioned in at least one back zone opposite, in a thickness direction of the carrier substrate, said local zone having the thinner thickness. 12. The device according to claim 8 , wherein the carrier substrate includes two peripheral rows of exterior electrical connection elements on a back face opposite said front face, wherein at least a portion of the two peripheral rows of the exterior electrical connection elements are positioned in at least one back zone opposite, in a thickness direction of the carrier substrate, said molded local zone having the thinner thickness.

Assignees

Inventors

Classifications

  • characterised by their shape or disposition · CPC title

  • batch processes · CPC title

  • Cutting or separating of wafers, substrates or parts of devices · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • using moulds · CPC title

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Frequently asked questions

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What does patent US9818664B2 cover?
An electronic device includes a carrier substrate with at least one electronic-circuit chip mounted on a front face of the carrier substrate. An encapsulation block on the front face and embedding the electronic-circuit chip has a periphery with corners. The encapsulating block further has, in at least one local zone located in at least one corner and from the front face of the carrier substrat…
Who is the assignee on this patent?
Stmicroelectronics (Grenoble 2) Sas
What technology area does this patent fall under?
Primary CPC classification H10W74/117. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).