Vertical Bit Line Non-Volatile Memory With Recessed Word Lines
US-2016300885-A1 · Oct 13, 2016 · US
Filament confinement in reversible resistance-switching memory elements
US9805793B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9805793-B2 |
| Application number | US-201615088902-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 1, 2016 |
| Priority date | Apr 1, 2016 |
| Publication date | Oct 31, 2017 |
| Grant date | Oct 31, 2017 |
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Abstract
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A method is provided that includes providing a memory device including a first word line, a vertical bit line, a non-volatile memory material disposed between the first word line and the vertical bit line, and a memory cell disposed between the first word line and the vertical bit line. The first word line has a first height. The method further includes forming one or more conductive filaments in the memory cell. The one or more conductive filaments are substantially confined to a filament region having a second height less than the first height and disposed substantially about a vertical center of the memory cell.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method comprising: providing a memory device comprising a first word line, a second word line, a third word line, a first dielectric spacer disposed between the first word line and the second word line, and a second dielectric spacer disposed between the first word line and the third word line, a vertical bit line, a non-volatile memory material disposed between the first word line and the vertical bit line, and a memory cell disposed between the first word line and the vertical bit line, the first word line having a first height, and the non-volatile memory material comprising a uniform thickness between the first word line and the vertical bit line; forming one or more conductive filaments in the memory cell by applying a first voltage to the first word line, a second voltage to the second and third word lines, and a third voltage to the vertical bit line, wherein the second voltage has a polarity opposite the first voltage, wherein the one or more conductive filaments are substantially confined to a filament region having a second height less than the first height and disposed substantially about a vertical center of the memory cell; and forming an electric field between the first word line and the vertical bit line, wherein the second voltage tunes the electric field to have a substantially maximum value towards the vertical center of the memory cell. 2. The method of claim 1 , further comprising electrically confining the one or more conductive filaments substantially in the filament region. 3. The method of claim 1 , wherein the non-volatile memory material comprises a reversible resistance-switching memory material. 4. The method of claim 1 , wherein the non-volatile memory material comprises a metal oxide material or a phase change material. 5. An apparatus comprising: a memory device comprising a first word line, a second word line, a third word line, a first dielectric spacer disposed between the first word line and the second word line, and a second dielectric spacer disposed between the first word line and the third word line, a vertical bit line, a non-volatile memory material disposed between the first word line and the vertical bit line, and a memory cell disposed between the first word line and the vertical bit line, the first word line having a first height, and the non-volatile memory material comprising a uniform thickness between the first word line and the vertical bit line; and a controller configured to: form one or more conductive filaments in the memory cell by applying a first voltage to the first word line, a second voltage to the second and third word lines, and a third voltage to the vertical bit line, wherein the second voltage has a polarity opposite the first voltage, wherein the one or more conductive filaments are substantially confined to a filament region having a second height less than the first height and disposed substantially about a vertical center of the memory cell; and form an electric field between the first word line and the vertical bit line, wherein the second voltage tunes the electric field to have a substantially maximum value towards the vertical center of the memory cell. 6. The apparatus of claim 5 , wherein the controller is further configured to electrically confine the one or more conductive filaments substantially in the filament region. 7. The apparatus of claim 5 , wherein the non-volatile memory material comprises a reversible resistance-switching memory material. 8. The apparatus of claim 5 , wherein the non-volatile memory material comprises a metal oxide material or a phase change material.
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Classifications
Write to perform initialising, forming process, electro forming or conditioning · CPC title
comprising amorphous/crystalline phase transition cells · CPC title
- G11C13/0069Primary
Writing or programming circuits or methods · CPC title
comprising metal oxide memory material, e.g. perovskites · CPC title
Three dimensional array · CPC title
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- What does patent US9805793B2 cover?
- A method is provided that includes providing a memory device including a first word line, a vertical bit line, a non-volatile memory material disposed between the first word line and the vertical bit line, and a memory cell disposed between the first word line and the vertical bit line. The first word line has a first height. The method further includes forming one or more conductive filaments …
- Who is the assignee on this patent?
- Sandisk Technologies Inc, Sandisk Technologies Llc
- What technology area does this patent fall under?
- Primary CPC classification G11C13/0069. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Oct 31 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).