Under bump metallurgy (UBM) and methods of forming same

US9793231B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9793231-B2
Application numberUS-201514788182-A
CountryUS
Kind codeB2
Filing dateJun 30, 2015
Priority dateJun 30, 2015
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device package includes a die, fan-out redistribution layers (RDLs) over the die, and an under bump metallurgy (UBM) over the fan-out RDLs. The UBM comprises a conductive pad portion and a trench encircling the conductive pad portion. The device package further includes a connector disposed on the conductive pad portion of the UBM. The fan-out RDLs electrically connect the connector and the UBM to the die.

First claim

Opening claim text (preview).

What is claimed is: 1. A device package comprises: a die; fan-out redistribution layers (RDLs) over the die; an under bump metallurgy (UBM) over the fan-out RDLs, wherein the UBM comprises: a conductive pad portion; a conductive retaining wall portion laterally separated from and encircling the conductive pad portion, the conductive retaining wall portion having a bottom-most portion physically contacting a conductive element of the fan-out RDLs; a trench encircling the conductive pad portion and separating the conductive pad portion and the conductive retaining wall portion, wherein a sidewall of the bottom-most portion of the conductive retaining wall directed away from the trench physically contacts an insulating material; and a connector disposed on the conductive pad portion of the UBM, wherein the fan-out RDLs electrically connect the connector and the UBM to the die. 2. The device package of claim 1 , wherein a width of the retaining wall portion is about mum to about 20 μm. 3. The device package of claim 1 , wherein the connector is not disposed on the retaining wall portion of the UBM. 4. The device package of claim 1 , wherein a width of the trench is between about 10 μm to about 20 μm. 5. The device package of claim 1 , wherein the fan-out RDLs comprise a conductive line, wherein the UBM is formed on a top surface of the conductive line, and wherein the trench exposes a portion of the conductive line. 6. The device package of claim 5 , wherein the fan-out RDLs comprise a polymer layer extending over a top surface of the conductive line. 7. The device package of claim 6 , wherein an entirety of the UBM is disposed in an opening in the polymer layer. 8. The device package of claim 6 , wherein the polymer layer covers edge portions of the UBM. 9. The device package of claim 6 , wherein the polymer layer is at least partially disposed in the trench. 10. A device package comprising: a device die; a conductive line over and electrically connected to the device die; a polymer layer extending over a top surface of the conductive line; an under bump metallurgy (UBM) formed on the top surface of the conductive line, wherein the UBM is at least partially exposed by an opening in the polymer layer, and wherein the UBM comprises: a conductive pad portion; and a conductive retaining wall portion forming a ring around the conductive pad portion, wherein the conductive retaining wall portion is separated from the conductive pad portion by a trench, wherein a bottom-most portion of the conductive retaining wall physically contacts the conductive line, and wherein a sidewall of a bottom-most portion of the conductive retaining wall directed away from the trench physically contacts material of the polymer layer; and a solder ball on the conductive pad portion of the UBM. 11. The device package of claim 10 , wherein the trench encircles the conductive pad portion, and wherein the trench at least partially exposes the top surface of the conductive line. 12. The device package of claim 10 , wherein the polymer layer is at least partially disposed in the trench. 13. The device package of claim 10 , wherein the polymer layer covers edges of the retaining wall portion of the UBM. 14. The device package of claim 10 , wherein the opening in the polymer layer completely exposes the UBM. 15. A device package comprising: a device die; a polymer layer over the device die; a conductive line in the polymer layer and electrically connected to the device die, wherein the polymer layer covers edges of the conductive line; a conductive pad contacting a surface of the conductive line, wherein the conductive pad is exposed by an opening in the polymer layer; and a conductive retaining wall having a bottom-most portion physically contacting the conductive line and surrounding the conductive pad in a top-down view of the device package, wherein the conductive retaining wall is separated from the conductive pad by a spacing, wherein the spacing is substantially free of any conductive material and surrounds the conductive pad in a top-down view of the device package, and wherein a sidewall of the bottom-most portion of the conductive retaining wall directed away from the spacing physically contacts the polymer layer. 16. The device package of claim 15 , wherein the opening in the polymer layer exposes at least a portion of the conductive retaining wall. 17. The device package of claim 15 , wherein the polymer layer covers edges of the conductive retaining wall. 18. The device package of claim 15 , wherein a sidewall of the polymer layer is disposed in the spacing. 19. The device package of claim 15 further comprising a solder ball on the conductive pad, wherein the solder ball does not contact a top surface of the conductive retaining wall.

Assignees

Inventors

Classifications

  • relative to the surface, e.g. recessed, protruding · CPC title

  • on encapsulations · CPC title

  • by using masks · CPC title

  • Changing the shapes of bond pads · CPC title

  • by plating, e.g. electroless plating or electroplating · CPC title

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Frequently asked questions

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What does patent US9793231B2 cover?
A device package includes a die, fan-out redistribution layers (RDLs) over the die, and an under bump metallurgy (UBM) over the fan-out RDLs. The UBM comprises a conductive pad portion and a trench encircling the conductive pad portion. The device package further includes a connector disposed on the conductive pad portion of the UBM. The fan-out RDLs electrically connect the connector and the U…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W20/063. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).