Stacked electronic device including a protective wafer bonded to a chip by an infused adhesive

Patent metadata

Field	Value
Publication number	US-9773740-B2
Application number	US-201514821902-A
Country	US
Kind code	B2
Filing date	Aug 10, 2015
Priority date	Nov 26, 2014
Publication date	Sep 26, 2017
Grant date	Sep 26, 2017

Abstract

A method for fabricating an electronic device, and an electronic device in a stacked configuration, includes a rear face of an integrated-circuit chip that is fixed to a front face of a support wafer. A protective wafer is located facing and at a distance from the front face of the chip, and an infused adhesive is interposed between the chip and the protective wafer and located on a zone of the front face of the chip outside a central region of this front face. The infused adhesive includes a curable adhesive and solid spacer elements infused in the curable adhesive. An obstruction barrier is arranged between the chip and the protective wafer and is disposed outside the central region of the front face of the chip. An encapsulation ring surrounds the chip, the protective wafer and the obstruction barrier.

First claim

The invention claimed is:

1. An electronic device, comprising:
a support wafer;
an integrated-circuit chip having a rear face fixed to the support wafer and a front face opposite the rear face;
a protective wafer located facing and at a distance from the front face of the integrated-circuit chip;
an infused adhesive interposed between the protective wafer and the integrated-circuit chip and located on a zone of the front face of the integrated-circuit chip outside a central region of the front face, the infused adhesive comprising a curable adhesive and solid spacer elements in the curable adhesive;
an obstruction barrier in the form of a peripheral ring arranged between the integrated-circuit chip and the protective wafer and disposed outside the central region of the front face of the integrated-circuit chip; and
an encapsulation block surrounding the integrated-circuit chip, the protective wafer, and the obstruction barrier;
wherein the infused adhesive is in a form of drops or segments at a distance from and not physically connected to one another.

2. The device according to claim 1 , wherein the obstruction barrier is formed of epoxy resin.

3. The device according to claim 2 , wherein the epoxy resin is curable using ultraviolet radiation.

4. The device according to claim 1 , wherein the integrated-circuit chip comprises a sensor located in the central region of the front face.

5. The device according to claim 4 , wherein the sensor is an optical sensor and the protective wafer is transparent.

6. A stacked electronic device, comprising:
a support wafer;
an integrated-circuit chip having a rear face fixed to the support wafer and a front face opposite the rear face;
a protective wafer disposed a distance from the front face of the integrated-circuit chip;
an infused adhesive interposed between and securing together the integrated-circuit chip and the protective wafer, the infused adhesive disposed outside a central region of the front face and comprising a curable adhesive and solid spacer elements in the curable adhesive;
an obstruction barrier interposed between the integrated-circuit chip and the protective wafer, the obstruction barrier configured as a closed peripheral ring surrounding the infused adhesive; and
an encapsulation ring surrounding the integrated-circuit chip, the protective wafer, and the obstruction barrier, the obstruction barrier preventing the encapsulation ring from reaching the central region;
wherein the infused adhesive is in a form of drops or segments spaced apart from and not physically connected with one another.

7. The stacked electronic device of claim 6 , wherein the obstruction barrier is formed of an epoxy resin.

8. The stacked electronic device of claim 7 , wherein the epoxy resin is curable using ultraviolet radiation.

9. The stacked electronic device of claim 6 , wherein the integrated-circuit chip comprises an optical sensor located in the central region of the front face, and the protective wafer is transparent.

Assignees

• Stmicroelectronics (Grenoble 2) Sas

Inventors

• Saxod Karine
• Sorrieul Marika

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/752

  between stacked chips · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W76/63

  characterised by their shape or disposition, e.g. between cap and walls of a container · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title