Semiconductor package and manufacturing method therefor

Patent metadata

Field	Value
Publication number	US-9768154-B2
Application number	US-201615271521-A
Country	US
Kind code	B2
Filing date	Sep 21, 2016
Priority date	Sep 25, 2015
Publication date	Sep 19, 2017
Grant date	Sep 19, 2017

Abstract

Disclosed herein is a semiconductor package that includes: a package substrate having a main surface; a plurality of semiconductor devices mounted on the main surface of the package substrate; a mold member formed on the main surface of the package substrate so as to cover the semiconductor devices, the mold member having an upper surface substantially parallel to the main surface of the package substrate; and an electromagnetic wave shield formed on the upper surface of the mold member. The mold member comprises a mold resin and metal magnetic particles dispersed in the mold resin. The metal magnetic particles are exposed to the upper surface of the mold member.

First claim

What is claimed is:

1. A semiconductor package comprising:
a package substrate having a main surface;
a plurality of semiconductor devices mounted on the main surface of the package substrate;
a mold member formed on the main surface of the package substrate so as to cover the semiconductor devices, the mold member having an upper surface substantially parallel to the main surface of the package substrate; and
an electromagnetic wave shield formed on the upper surface of the mold member,
wherein the mold member comprises a mold resin and metal magnetic particles dispersed in the mold resin, and
wherein the metal magnetic particles are exposed to the upper surface of the mold member.

2. The semiconductor package as claimed in claim 1 ,
wherein the mold member further has side surfaces substantially perpendicular to the main surface of the package substrate,
wherein the metal magnetic particles are further exposed to the side surfaces of the mold member, and
wherein the electromagnetic wave shield is further formed on the side surfaces of the mold member.

3. The semiconductor package as claimed in claim 1 , wherein the semiconductor devices include a first semiconductor device having a first functional block that is a source of electromagnetic wave noise and a second semiconductor device having a second functional block including an analog circuit whose signal processing characteristics is deteriorated by the electromagnetic wave noise.

4. The semiconductor package as claimed in claim 3 , wherein both of the first and second functional blocks are a power amplifier.

5. The semiconductor package as claimed in claim 3 , wherein the first functional block is a memory, and the second functional block is a power amplifier.

6. The semiconductor package as claimed in claim 1 , wherein the metal magnetic particles have a flat shape and dispersed in the mold resin such that a planar direction thereof is substantially parallel to the main surface of the package substrate.

7. The semiconductor package as claimed in claim 1 , wherein the metal magnetic particles have a spherical shape.

8. The semiconductor package as claimed in claim 1 , wherein the electromagnetic wave shield is a metal film formed by plating.

9. A method for manufacturing a semiconductor package, the method comprising:
mounting a plurality of semiconductor devices on a main surface of a package substrate;
forming, on the main surface of the package substrate, a mold member including a mold resin and metal magnetic particles dispersed in the mold resin so as to cover the plurality of semiconductor devices;
grinding an upper surface of the mold member substantially parallel to the main surface of the package substrate to expose the metal magnetic particles to the upper surface; and
covering the upper surface of the mold member by an electromagnetic wave shield.

10. The method for manufacturing the semiconductor package as claimed in claim 9 , further comprising dicing the mold member to expose the metal magnetic particles to side surfaces of the mold member substantially perpendicular to the main surface of the package substrate,
wherein the side surfaces of the mold member is further covered with the electromagnetic wave shield.

11. The method for manufacturing the semiconductor package as claimed in claim 9 , wherein the covering is performed by electroless plating.

12. The method for manufacturing the semiconductor package as claimed in claim 11 , wherein the electroless plating is performed using a plating solution free from catalyst.

13. A semiconductor package comprising:
a substrate;
a semiconductor device mounted on the substrate;
a mold member embedding the semiconductor device, the mold member including metal magnetic particles made of a first metal material; and
a shield layer formed on the mold member, the shield layer is made of a second metal material,
wherein a part of the metal magnetic particles is in contact with the shield layer without an intervention of a dielectric material.

14. The semiconductor package as claimed in claim 13 , wherein the metal magnetic particles have a flat shape.

15. The semiconductor package as claimed in claim 14 , wherein a planar direction the metal magnetic particles is substantially parallel to the package substrate.

16. The semiconductor package as claimed in claim 13 , wherein the metal magnetic particles have a spherical shape.

Assignees

• Tdk Corp

Inventors

• Tomonari Toshio
• Asou Hirohumi
• Abe Hisayuki

Classifications

• H10W42/284

  shielding resins · CPC title

• H10W42/287

  materials for magnetic shielding, e.g. ferromagnetic materials · CPC title

• H10W42/276

  the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title