Corrosion resistant barrier formed by vapor phase tin reflow
US-9224550-B2 · Dec 29, 2015 · US
Electroless surface treatment plated layers of printed circuit board and method for preparing the same
US9743508B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9743508-B2 |
| Application number | US-201514847232-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 8, 2015 |
| Priority date | Jun 28, 2011 |
| Publication date | Aug 22, 2017 |
| Grant date | Aug 22, 2017 |
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Abstract
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An electroless surface treatment plated layer of a printed circuit board, a method for preparing the same, and printed circuit board including the same. The electroless surface treatment plated layer includes: electroless nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating, wherein the electroless nickel, palladium, and gold plated coatings have thicknesses of 0.02 to 1 μm, 0.01 to 0.3 μm, and 0.01 to 0.5 μm, respectively. In the electroless surface treatment plated layer of the printed circuit board, a thickness of the nickel plated coating is specially minimized to 0.02 to 1 μm, thereby making it possible to form an optimized electroless Ni/Pd/Au surface treatment plated layer.
First claim
Opening claim text (preview).
The invention claimed is: 1. A printed circuit board, comprising: an electroless surface treatment plated layer, wherein the electroless surface treatment plated layer comprises nickel (Ni) plated coating, palladium (Pd) plated coating, and gold (Au) plated coating, and wherein the nickel plated coating, the palladium plated coating, and the gold plated coating each have a thickness of 0.02 to 1 μm, 0.01 to 0.3 μm, and 0.01 to 0.5 μm, respectively. 2. The printed circuit board according to claim 1 , wherein it is connected to external devices in a wire bonding scheme. 3. The printed circuit board according to claim 1 , wherein 8 wt % or more of phosphorus (P) is contained in the electroless nickel plated coating. 4. The printed circuit board according to claim 3 , wherein the phosphorus (P) is to prevent oxidation of the electroless nickel plated coating. 5. The printed circuit board according to claim 1 , wherein even though a frequency band increases, an electrical resistance value of the electroless surface treatment plated layer does not increase.
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Classifications
comprising gold [Au] · CPC title
comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title
of bond wires · CPC title
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9743508B2 cover?
- An electroless surface treatment plated layer of a printed circuit board, a method for preparing the same, and printed circuit board including the same. The electroless surface treatment plated layer includes: electroless nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating, wherein the electroless nickel, palladium, and gold plated coatings have thicknesses of 0.02…
- Who is the assignee on this patent?
- Samsung Electro Mech
- What technology area does this patent fall under?
- Primary CPC classification B32B15/018. Mapped technology areas include Operations & Transport.
- When was this patent published?
- Publication date Tue Aug 22 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).