Antenna cavity structure for integrated patch antenna in integrated fan-out packaging

US9711465B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9711465-B2
Application numberUS-201615056030-A
CountryUS
Kind codeB2
Filing dateFeb 29, 2016
Priority dateMay 29, 2012
Publication dateJul 18, 2017
Grant dateJul 18, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated fan-out package having a top-side redistribution wiring structure, a back-side redistribution wiring layer, a ground plane provided in the back-side redistribution wiring layer, and a molding compound layer having a thickness and provided between the back-side redistribution wiring layer and the top-side redistribution wiring structure is disclosed. The package has an RF IC die embedded within the molding compound layer and one or more integrated patch antenna structure provided in the top-side redistribution wiring structure. The one or more integrated patch antenna structure is coupled to the RF IC die and an antenna cavity is provided within the molding compound layer under each of the one or more integrated patch antenna.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated fan-out package comprising: a top-side redistribution wiring structure; a back-side redistribution wiring layer having a ground plane therein; a molding compound layer having a thickness and provided between the back-side redistribution wiring layer and the top-side redistribution wiring structure; a radio frequency (RF) integrated circuit (IC) die at least laterally embedded within the molding compound layer; one or more integrated patch antenna structure in the top-side redistribution wiring structure, wherein the one or more integrated patch antenna structure is coupled to the RF IC die; an antenna cavity within the molding compound layer under each of the one or more integrated patch antenna structure, wherein each of the antenna cavity is defined by a cavity sidewall structure and the ground plane, wherein the cavity sidewall structure is provided within the molding compound layer and in electrical contact with the ground plane and extending from the ground plane through the thickness of the molding compound layer. 2. The integrated fan-out package of claim 1 , wherein the cavity sidewall structure is a single solid wall structure conductively connected to the ground plane. 3. The integrated fan-out package of claim 1 , wherein the cavity sidewall structure comprises two or more continuous segments that are conductively connected to the ground plane, each continuous segment extending from a corner of the cavity sidewall structure to an adjacent corner of the cavity sidewall structure. 4. The integrated fan-out package of claim 1 , wherein the cavity sidewall structure comprises a plurality of through-InFO vias that are conductively connected to the ground plane. 5. The integrated fan-out package of claim 1 , wherein the molding compound is one of an epoxy, a polymer, a spin-on-glass, or a ceramic. 6. The integrated fan-out package of claim 1 , wherein the top-side redistribution wiring structure comprises at least three levels of redistribution wiring layers and the one or more integrated patch antenna structure is provided in a middle one of the at least three levels of redistribution wiring layers. 7. The integrated fan-out package of claim 1 , wherein the ground plane is a solid metal planar structure. 8. The integrated fan-out package of claim 1 , wherein the ground plane is formed of a mesh or a set of electrically conductively connected parallel lines. 9. The integrated fan-out package of claim 1 , wherein the one or more integrated patch antenna structure comprises a radiating patch on one side of a dielectric substrate which has a ground plane on the other side. 10. The integrated fan-out package of claim 1 , wherein each cavity sidewall structure is configured to have a perimeter outline shape that matches the corresponding one or more integrated patch antenna structure's perimeter outline. 11. An integrated fan-out package comprising: a top-side redistribution wiring structure; a back-side redistribution wiring layer having one or more ground planes therein; a molding compound layer having a thickness and provided between the back-side redistribution wiring layer and the top-side redistribution wiring structure; a radio frequency (RF) integrated circuit (IC) die at least laterally embedded within the molding compound layer; one or more integrated patch antenna structure in the top-side redistribution wiring structure, wherein the one or more integrated patch antenna structure is coupled to the RF IC die; an antenna cavity within the molding compound layer under each of the one or more integrated patch antenna structure, wherein each of the antenna cavity is defined by a cavity sidewall structure and one of the at least one or more ground planes, wherein the cavity sidewall structure is provided within the molding compound layer and in electrical contact with the one of the at least one or more ground planes and extending from the one of the at least one or more ground planes through the thickness of the molding compound layer. 12. The integrated fan-out package of claim 11 , wherein the cavity sidewall structure is a single continuous wall structure conductively connected to the one of the at least one or more ground planes. 13. The integrated fan-out package of claim 11 , wherein the cavity sidewall structure comprises two or more continuous segments that are conductively connected to the one of the at least one or more ground planes, each continuous segment extending from a corner of the cavity sidewall structure to an adjacent corner of the cavity sidewall structure. 14. The integrated fan-out package of claim 11 , wherein the cavity sidewall structure comprises a plurality of through-InFO vias that are conductively connected to the one of the at least one or more ground planes. 15. The integrated fan-out package of claim 11 , wherein the molding compound is one of an epoxy, a polymer, a spin-on-glass, or a ceramic. 16. The integrated fan-out package of claim 11 , wherein the top-side redistribution wiring structure comprises at least three levels of redistribution wiring layers and the one or more integrated patch antenna structure is provided in a middle one of the at least three levels of redistribution wiring layers. 17. The integrated fan-out package of claim 11 , wherein the one of the at least one or more ground planes is a solid metal planar structure. 18. The integrated fan-out package of claim 11 , wherein the one of the at least one or more ground planes is formed of a mesh or a set of electrically conductively connected parallel lines. 19. The integrated fan-out package of claim 11 , wherein the one or more integrated patch antenna structure comprises a radiating patch on one side of a dielectric substrate which has a ground plane on the other side. 20. The integrated fan-out package of claim 11 , wherein each cavity sidewall structure is configured to have a perimeter outline shape that matches the corresponding one or more integrated patch antenna structure's perimeter outline.

Assignees

Inventors

Classifications

  • the encapsulations exposing the passive side of the semiconductor body · CPC title

  • Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers · CPC title

  • On different surfaces · CPC title

  • comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

  • Bond pads specially adapted therefor · CPC title

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Frequently asked questions

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What does patent US9711465B2 cover?
An integrated fan-out package having a top-side redistribution wiring structure, a back-side redistribution wiring layer, a ground plane provided in the back-side redistribution wiring layer, and a molding compound layer having a thickness and provided between the back-side redistribution wiring layer and the top-side redistribution wiring structure is disclosed. The package has an RF IC die em…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W44/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 18 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).