Variation-aware timing analysis using waveform construction

Patent metadata

Field	Value
Publication number	US-9710594-B2
Application number	US-201514936886-A
Country	US
Kind code	B2
Filing date	Nov 10, 2015
Priority date	Nov 10, 2015
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

A method of performing variation aware timing analysis for an integrated circuit, a system, and a computer program product are described. The method includes determining one or more voltage waveforms at an output of a first component of the integrated circuit based on respective one or more first processing conditions, and storing waveform information based on the one or more voltage waveforms. The method also includes obtaining an input voltage waveform at an input of a second component of the integrated circuit for a second processing condition based on processing the waveform information, the output of the first component being the input of the second component, and performing the variation aware timing analysis for the second component based on the input voltage waveform.

First claim

What is claimed is:

1. A computer-implemented method of performing variation aware timing analysis for an integrated circuit, the method comprising:
determining, using a processor, one or more voltage waveforms at an output of a first component of the integrated circuit based on respective one or more first processing conditions;
storing, using a memory device, waveform information based on the one or more voltage waveforms;
obtaining, using the processor, an input voltage waveform at an input of a second component of the integrated circuit for a second processing condition based on the waveform information, wherein the output of the first component is the input of the second component, wherein the obtaining the input voltage waveform at the input of the second component for the second processing condition includes scaling and shifting the waveform information to match the arrival time and the slew at the input of the second component for the second processing condition; and
performing the variation aware timing analysis for the second component based on the input voltage waveform, wherein manufacturing the integrated circuit is based on the variation aware timing analysis.

2. The computer-implemented method according to claim 1 , wherein the performing the variation aware timing analysis includes performing statistical timing analysis or multi-corner timing analysis.

3. The computer-implemented method according to claim 1 , wherein the storing the waveform information includes storing one or more of the one or more voltage waveforms.

4. The computer-implemented method according to claim 1 , wherein the storing the waveform information includes storing a composite waveform generated from the one or more waveforms.

5. The computer-implemented method according to claim 1 , wherein the storing the waveform information is based on the one or more first processing conditions.

6. The computer-implemented method according to claim 1 , further comprising determining an arrival time and slew at the output of the first component for the second processing condition.

7. The computer-implemented method according to claim 1 , wherein the scaling is based on a non-linear scaling function.

8. A system to perform variation aware timing analysis for an integrated circuit, the system comprising:
a memory device configured to store waveform information based on one or more voltage waveforms; and
a processor configured to determine the one or more voltage waveforms at an output of a first component of the integrated circuit based on respective one or more first processing conditions, obtain an input voltage waveform at an input of a second component of the integrated circuit for a second processing condition based on processing the waveform information, the output of the first component being the input of the second component, and perform the variation aware timing analysis for the second component based on the input voltage waveform, wherein the processor determines the input voltage waveform at the input of the second component at the second processing condition based on scaling and shifting the waveform information to match the arrival time and the slew at the input of the second component at the second processing condition and the variation aware timing analysis is provided to manufacture the integrated circuit.

9. The system according to claim 8 , wherein the processor stores one or more of the one or more voltage waveforms as the waveform information.

10. The system according to claim 8 , wherein the processor generates a composite waveform from the one or more voltage waveforms as the waveform information.

11. The system according to claim 8 , wherein the processor determines the waveform information from the one or more voltage waveforms based on the corresponding one or more processing conditions.

12. The system according to claim 8 , wherein the processor determines an arrival time and slew at the output of the first component, which is the input of the second component, at the second processing condition.

13. The system according to claim 8 , wherein the processor scales the waveform information based on a non-linear scaling function.

14. A computer program product for performing variation aware timing analysis for an integrated circuit, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to perform a method comprising:
determining one or more voltage waveforms at an output of a first component of the integrated circuit based on respective one or more first processing conditions;
storing waveform information based on the one or more voltage waveforms;
obtaining an input voltage waveform at an input of a second component of the integrated circuit for a second processing condition based on processing the waveform information, the output of the first component being the input of the second component, wherein the obtaining the input voltage waveform at the input of the second component at the second processing condition includes scaling and shifting the waveform information to match the arrival time and the slew at the input of the second component at the second processing condition; and
performing the variation aware timing analysis for the second component based on the input voltage waveform, wherein manufacturing the integrated circuit is based on the variation aware timing analysis.

15. The computer program product according to claim 14 , wherein the storing the waveform information includes storing one or more of the one or more voltage waveforms or storing a composite waveform generated from the one or more waveforms.

16. The computer program product according to claim 14 , wherein the storing the waveform information is based on the one or more first processing conditions.

17. The computer program product according to claim 14 , further comprising determining an arrival time and slew at the output of the first component, which is the input of the second component, at the second processing condition.

18. The computer program product according to claim 17 , wherein the scaling is based on a non-linear scaling function.

Assignees

• IBM
• IBM

Inventors

• Kalafala Kerim
• Raghunathan Sheshashayee K
• Sinha Debjit
• Wood Michael H
• Zolotov Vladimir

Classifications

• G06F30/398 Primary

  Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title

• G06F30/3312

  Timing analysis · CPC title

• G06F2119/12

  Timing analysis or timing optimisation · CPC title

• G06F30/367

  Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods · CPC title

• G06F2111/08

  Probabilistic or stochastic CAD · CPC title