Microelectronic device attachment on a reverse microelectronic package

US9699904B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9699904-B2
Application numberUS-201213993343-A
CountryUS
Kind codeB2
Filing dateMar 13, 2012
Priority dateMar 13, 2012
Publication dateJul 4, 2017
Grant dateJul 4, 2017

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present description relates to the field of fabricating microelectronic structures. The microelectronic structure may include a microelectronic substrate have an opening, wherein the opening may be formed through the microelectronic substrate or may be a recess formed in the microelectronic substrate. A microelectronic package may be attached to the microelectronic substrate, wherein the microelectronic package may include an interposer having a first surface and an opposing second surface. A microelectronic device may be attached to the interposer first surface and the interposer may be attached to the microelectronic substrate by the interposer first surface such that the microelectronic device extends into the opening. At least one secondary microelectronic device may be attached to the interposer second surface.

First claim

Opening claim text (preview).

The invention claimed is: 1. A microelectronic structure, comprising: a microelectronic substrate having a first surface, a second surface, and an opening extending from the microelectronic substrate first surface and the microelectronic substrate second surface; a microelectronic package comprising a microelectronic interposer having at least one microelectronic device electrically attached to a first surface of the microelectronic interposer, wherein the microelectronic package is electrically attached to the microelectronic substrate first surface by the microelectronic interposer first surface and wherein the at least one microelectronic device extends at least partially into the microelectronic substrate opening; and a heat dissipation device in thermal contact with the microelectronic device, wherein the heat dissipation device comprises a heat spreader couple to a heat pipe, wherein at least a portion of the heat spreader extends into the microelectronic substrate opening; and wherein the heat pipe is external to the microelectronic substrate opening and extends over the microelectronic substrate second surface. 2. The microelectronic structure of claim 1 , further including at least one secondary microelectronic device attached to a second surface of the microelectronic interposer. 3. The microelectronic structure of claim 2 , wherein the microelectronic device comprises a microprocessor and the secondary microelectronic device comprises a memory device. 4. The microelectronic structure of claim 1 , wherein at least a portion of the heat spreader dissipation device is incorporated into the microelectronic substrate. 5. The microelectronic structure of claim 1 , further including at least one passive device attached to the microelectronic interposer second surface. 6. The microelectronic structure of claim 1 , wherein the heat spreader abuts the microelectronic substrate within the microelectronic substrate opening. 7. The microelectronic structure of claim 1 , wherein the heat spreader is attached to the microelectronic substrate within the microelectronic substrate opening. 8. The microelectronic structure of claim 1 , wherein the microelectronic substrate includes at least one additional microelectronic device attached to a first surface of the microelectronic substrate. 9. The microelectronic structure of claim 1 , wherein the microelectronic substrate includes at least one additional microelectronic device attached to a second surface of the microelectronic substrate. 10. The microelectronic structure of claim 1 , wherein the microelectronic substrate includes conductive routes thereon or therein. 11. The microelectronic structure of claim 1 , wherein the microelectronic interposer includes conductive routes thereon or therein. 12. The microelectronic structure of claim 1 , wherein the at least one microelectronic device is attached to the first surface of the microelectronic interposer with a plurality of solder balls. 13. The microelectronic structure of claim 2 , wherein the at least one secondary microelectronic device is attached to the second surface of the microelectronic interposer with a plurality of solder balls.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • of bump connectors · CPC title

  • characterised by changes in properties of the bump connectors during connecting · CPC title

  • Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

  • for cooling by change of state · CPC title

Patent family

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Frequently asked questions

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What does patent US9699904B2 cover?
The present description relates to the field of fabricating microelectronic structures. The microelectronic structure may include a microelectronic substrate have an opening, wherein the opening may be formed through the microelectronic substrate or may be a recess formed in the microelectronic substrate. A microelectronic package may be attached to the microelectronic substrate, wherein the mi…
Who is the assignee on this patent?
Loo Howe Yin, Chee Choong Kooi, Intel Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/68. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 04 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).