Method for analyzing discrete traps in semiconductor devices

US9691861B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9691861-B2
Application numberUS-201414149345-A
CountryUS
Kind codeB2
Filing dateJan 7, 2014
Priority dateJan 7, 2014
Publication dateJun 27, 2017
Grant dateJun 27, 2017

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Abstract

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A method analyzes traps in a semiconductor device by determining a first-order derivative of a signal representing an operation of the semiconductor device over time to produce a signal rate change. The traps in the semiconductor device are analyzed based on lifetimes corresponding to peaks of the signal rate change.

First claim

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We claim: 1. A method for analyzing lifetimes of traps in a semiconductor device, comprising steps: determining a first-order derivative of a signal representing an operation of the semiconductor device over time to produce a signal rate change over time; determining a number of lifetimes based on a number of peaks of the signal rate change, wherein the peaks are locally largest magnitudes of an absolute value of the of the signal rate change; fitting the signal representing the operation of the semiconductor device over time to a multiexponential function formed as a linear combination of exponential curves, wherein a number of the exponential curves in the linear combination equals the number of the lifetimes, and wherein each exponential curve has an exponent value and a coefficient; and determining one or a combination of the lifetimes in the semiconductor device and corresponding magnitudes of the lifetimes, wherein the lifetimes correspond to the exponent values of the exponential curves and the magnitudes correspond to the coefficients of the exponential curves in the linear combination, wherein the steps are performed in a processor. 2. The method of claim 1 , further comprising: determining discrete lifetimes of the traps based on the locations of the peaks, wherein the peaks with less than a predetermined magnitude are disregarded, and wherein nearby, using a threshold, locations of multiple peaks are combined into a single lifetime to enforce the lifetimes to be discrete and sparsely distributed in time. 3. The method of claim 1 , wherein the fitting of the signal representing the operation of the semiconductor device over time to the multiexponential function is determined iteratively, starting with predetermined initial values of one or a combination of the exponent values and the coefficients of the exponential curves in the linear combination. 4. The method of claim 1 , further comprising: determining the exponent values of the exponential curves in the linear combination is performed based on locations in time of the peaks of the signal rate change; and determining the corresponding magnitude for each lifetime in based on fitting the signal according to the multiexponential function formed as the linear combination of exponential curves with the predetermined exponents, wherein the magnitude is given by a coefficient in the linear combination corresponding to a specific exponential curve. 5. The method of claim 4 , wherein determining the multiexponential function by fitting the signal uses a least squares procedure. 6. The method of claim 5 , further comprising: optimizing the approximate lifetimes and the approximate magnitudes using a nonlinear least squares procedure to determine the lifetimes and the corresponding magnitudes concurrently. 7. The method of claim 6 , wherein approximate lifetimes remain discrete due to minimization constraints. 8. The method of claim 1 , wherein the determining further comprises: determining the signal rate change using a finite difference method. 9. The method of claim 1 , further comprising: interpolating measurements of the operation on a uniform grid having a logarithmic time scale to produce the signal; and filtering the signal to reduce noise. 10. The method of claim 1 , wherein the determining comprises: determining the signal rate change using a Fourier spectral method. 11. The method of claim 1 , wherein the semiconductor device is gallium nitride (GaN) high-electron-mobility transistor (HEMT). 12. The method of claim 1 , wherein the lifetimes are discrete, that is, sparsely distributed in time, as determined by a threshold. 13. The method of claim 1 , further comprising: obtaining approximate lifetimes as locations of maxima of an absolute value of a first-order derivative. 14. The method of claim 1 , further comprising: manufacturing the semiconductor device adaptively according to the lifetimes and the corresponding magnitudes determined in real-time. 15. The method of claim 1 , wherein a group of lifetimes in a matrix version of the method corresponds to centers of clusters of the lifetimes determined independently for data in the group. 16. The method of claim 1 , wherein the method is performed in real time. 17. The method of claim 1 , wherein multiple curves are fitted independently in a multi-threaded manner, using parallel computing. 18. The method of claim 1 , wherein the steps are performed on a special hardware computing processor, a graphics processing unit (GPU) or field-programmable gate array (FPGA). 19. The method of claim 1 , further comprising: detecting impending failures in the semiconductor device using the lifetimes. 20. The method of claim 1 , wherein the lifetimes and the magnitudes correspond to manufacturing or operating conditions of the semiconductor device. 21. The method of claim 1 , further comprising: acquiring a set of signals; determining the first-order derivative of each signal to produce the signal rate changes for each condition of the device; clustering times at the locations of the peaks of different signal rate changes to produce a set of clusters; determining discrete lifetimes for the set of clusters as locations of centers of each clusters, such that the number of lifetimes equals a number of the clusters; analyzing a corresponding magnitude for each discrete lifetime for each signal based on fitting the signal according to the multiexponential function, wherein the fitting is performed using a least squares procedure. 22. The method of claim 21 , wherein the set of signals represents the operation of the semiconductor device under different conditions over time, wherein the different conditions are expected to preserve lifetimes that are the same. 23. The method of claim 21 , wherein the set of signals represents the operation of different semiconductor devices being manufactured and operating under similar conditions over time, wherein the similar conditions are expected to preserve lifetimes that are the same. 24. An apparatus, comprising: a semiconductor device; a sensor for measuring a signal representing an operation of the semiconductor device over time; and a processor configured for determining a first-order derivative of a signal representing an operation of the semiconductor device over time to produce a signal rate change over time; determining a number of lifetimes based on a number of peaks of the signal rate change, wherein the peaks are locally largest magnitudes of an absolute value of the of the signal rate change; fitting the signal representing the operation of the semiconductor device over time to a multiexponential function formed as a linear combination of exponential curves, wherein a number of the exponential curves in the linear combination equals the number of the lifetimes, and wherein each exponential curve has an exponent value and a coefficient; and determining one or a combination of the lifetimes in the semiconductor device and corresponding magnitudes of the lifetimes, wherein the lifetimes correspond to the exponent values of the exponential curves and the magnitudes correspond to the coefficients of the exponential curves in the linear combination. 25. The apparatus of claim 24 , wherein the analyzing is performed in order to provide manufacture quality control. 26. The apparatus of claim 24 , wherein the analyzi

Assignees

Inventors

Classifications

  • H10P74/207Primary

    Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title

  • High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] · CPC title

  • Nitride Group III-V materials, e.g. AlN or GaN · CPC title

  • Electricity · mapped topic

  • Aspects of quality control [QC] (G01R31/31718 takes precedence; program control for QC G05B19/41875) · CPC title

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What does patent US9691861B2 cover?
A method analyzes traps in a semiconductor device by determining a first-order derivative of a signal representing an operation of the semiconductor device over time to produce a signal rate change. The traps in the semiconductor device are analyzed based on lifetimes corresponding to peaks of the signal rate change.
Who is the assignee on this patent?
Mitsubishi Electric Res Laboratories Inc
What technology area does this patent fall under?
Primary CPC classification H10P74/207. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 27 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).