Semiconductor to metal transition for semiconductor devices

US9685504B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9685504-B2
Application numberUS-201615253070-A
CountryUS
Kind codeB2
Filing dateAug 31, 2016
Priority dateNov 14, 2014
Publication dateJun 20, 2017
Grant dateJun 20, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration, and a damage region between the contact region and the transition region. The damage region is configured for reducing lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers, wherein the first semiconductor region comprises: a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers; a contact region having a second concentration of the first charge carriers, wherein the second concentration is higher than the first concentration; and a damage region between the contact region and the transition region, the damage region being configured to reduce lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region. 2. The semiconductor device of claim 1 , wherein the contact region is doped with a contact region doping material, the contact region doping material comprising at least one of boron and phosphorus, and wherein the contact region doping material establishes a presence of the first charge carriers in the contact region. 3. The semiconductor device of claim 1 , wherein the damage region is doped with a damage region doping material, the damage region doping material comprising at least one of germanium, silicon, carbon, helium, neon, argon, xenon, and krypton. 4. The semiconductor device of claim 3 , wherein the damage region doping material is not activated. 5. The semiconductor device of claim 1 , wherein the transition region and the contact region are doped with a same contact region doping material, and wherein the contact region doping material included in the transition region establishes a presence of the first charge carriers in the transition region. 6. The semiconductor device of claim 1 , wherein the second semiconductor region is doped with a second semiconductor region doping material, the second semiconductor region doping material establishing a presence of the second charge carriers. 7. The semiconductor device of claim 6 , wherein the second semiconductor region doping material comprises at least one of phosphorus, arsenic and antimony. 8. The semiconductor device of claim 1 , wherein the damage region has, in a direction of a flow of a load current conducted by the semiconductor device, a thickness in a range of 50 nm to 1000 nm. 9. The semiconductor device of claim 1 , wherein the contact region has, in a direction of a flow of a load current conducted by the semiconductor device, a thickness in the range of 50 nm to 1000 nm. 10. The semiconductor device of claim 1 , wherein the transition region has, in a direction of a flow of a load current conducted by the semiconductor device, a thickness in the range of 200 nm to 10000 nm. 11. The semiconductor device of claim 1 , wherein the second concentration of the first charge carriers in the contact region is at least 50 times as high as the first concentration of the first charge carriers in the transition region. 12. The semiconductor device of claim 1 , wherein the damage region extends, in a direction of a flow of a load current conducted by the semiconductor device, deeper into the first semiconductor region than the contact region, and wherein the transition region extends deeper into the first semiconductor region than the damage region. 13. A semiconductor component to metal contact transition, the metal contact comprising: a metallization layer configured for being contacted by an external contactor and for receiving a load current via the external contactor, wherein the semiconductor component comprises: a first semiconductor region having first charge carriers of a first conductivity type; and a second semiconductor region having second charge carriers; wherein the first semiconductor region comprises: a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers; a contact region having a second concentration of the first charge carriers, the second concentration being higher than the first concentration; a damage region between the contact region and the transition region, the damage region being configured for reducing lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region. 14. A method of manufacturing a semiconductor device, the method comprising: providing a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers, wherein the first semiconductor region comprises a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers; and forming, in the first semiconductor region, a contact region having a second concentration of the first charge carriers that is higher than the first concentration; forming, in the first semiconductor region, a damage region configured for reducing lifetime and/or mobility of the first charge carriers of the damage region as compared to the lifetime and/or the mobility of the first charge carriers of the contact region and the transition region. 15. The method of claim 14 , wherein creating the damage region comprises applying a damage implantation of a damage region doping material between the contact region and the transition region. 16. The method of claim 15 , wherein the damage doping material is not activated during manufacturing of the semiconductor device. 17. The method of claim 15 , wherein the damage region doping material comprises at least one of germanium, silicon, carbon, helium, neon, argon, xenon, and krypton, and wherein an implantation dose of the damage implantation is in the range of 10 11 cm −2 to 10 15 cm −2 .

Assignees

Inventors

Classifications

  • of electrically inactive species · CPC title

  • into Group IV semiconductors · CPC title

  • the conductive layers comprising transition metals · CPC title

  • of electrodes ohmically coupled to a semiconductor · CPC title

  • H01L29/063Primary

    Electricity · mapped topic

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What does patent US9685504B2 cover?
A semiconductor device includes a first semiconductor region having first charge carriers of a first conductivity type and a second semiconductor region having second charge carriers. The first semiconductor region includes a transition region in contact with the second semiconductor region, the transition region having a first concentration of the first charge carriers, a contact region having…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H01L29/063. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 20 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).