Method of forming self aligned continuity blocks for mandrel and non-mandrel interconnect lines

Patent metadata

Field	Value
Publication number	US-9679809-B1
Application number	US-201615077564-A
Country	US
Kind code	B1
Filing date	Mar 22, 2016
Priority date	Mar 22, 2016
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

A method of forming a pattern for interconnect lines in an integrated circuit includes providing a structure having a first lithographic stack, a mandrel layer and a pattern layer disposed over a dielectric stack. Patterning the structure to form mandrels in the mandrel layer and disposing a spacer layer over the mandrels. Etching the spacer layer to form spacers disposed on sidewalls of the mandrels. The spacers and mandrels defining beta and gamma regions. A beta region includes a beta block mask portion and a gamma region includes a gamma block mask portion of the pattern layer. The method also includes etching a beta pillar over the beta block mask portion and etching a gamma pillar over the gamma block mask portion. The method also includes etching the structure to form a pattern in the pattern layer, the pattern including the gamma and beta block mask portions.

First claim

What is claimed is:

1. A method comprising:
providing a structure having a first lithographic stack, a mandrel layer and a pattern layer disposed over a dielectric stack;
patterning the structure to form mandrels in the mandrel layer;
disposing a spacer layer over the mandrels;
etching the spacer layer to form spacers disposed on sidewalls of the mandrels, the spacers and mandrels defining beta and gamma regions extending normally through the dielectric stack;
etching a beta pillar mask over a beta region, the beta pillar mask not extending over any adjacent beta regions, the beta pillar mask extending over and defining a beta block mask portion of the pattern layer disposed within the beta region;
disposing a second lithographic stack of layers over the structure, the second lithographic stack including a resist layer as a top layer and a spin-on hardmask (SOH) layer as a bottom layer;
patterning a gamma pillar mask into the resist layer, the gamma pillar mask being disposed over a gamma region, the gamma pillar mask not extending over any adjacent gamma regions, the gamma pillar mask extending over and defining a gamma block mask portion of the pattern layer disposed within the gamma region;
anisotropically etching the lithographic stack through the SOH layer to form the gamma pillar mask into the SOH layer and to expose portions of the pattern layer in gamma regions not covered by the gamma pillar mask;
etching the structure to form a pattern in the pattern layer, the pattern including the gamma and beta block mask portions formed from the gamma and beta pillar masks; and
selectively etching the exposed portions of pattern layer to form gamma interconnect line locations of the pattern.

2. The method of claim 1 comprising:
the beta region extending through the mandrels, and
the gamma region extending through the portions of the pattern layer which are absent any overlaying spacers and mandrels.

3. The method of claim 2 comprising:
the beta region having a width equal to a mandrel width; and
the gamma region having a width equal to a distance between the mandrels minus twice a spacer width.

4. The method of claim 1 comprising removing the gamma pillar mask to expose the gamma block mask portion of the pattern.

5. The method of claim 4 comprising:
disposing a third lithographic stack of layers over the structure, the third lithographic stack including a resist layer as a top layer and a spin-on hardmask (SOH) layer as a bottom layer;
patterning the beta pillar mask into the resist layer;
anisotropically etching the third lithographic stack through the SOH layer to form the beta pillar mask into the SOH layer, the beta pillar mask being disposed over a mandrel in a beta region, wherein the mandrel overlays the beta block mask portion of the pattern; and
anisotropically etching the SOH layer to expose a top surface of the mandrels without exposing the pattern layer in the gamma regions.

6. The method of claim 5 comprising selectively etching away the mandrels from the beta regions to expose the pattern layer in the beta regions.

7. The method of claim 6 comprising selectively etching the exposed portions of pattern layer in the beta regions to form beta interconnect line locations in the pattern.

8. The method of claim 7 comprising etching away the beta pillar mask and remaining portions of the SOH layer to expose the full pattern.

9. The method of claim 8 comprising:
etching the pattern to:
form gamma and beta line trenches in the gamma and beta regions respectively of the dielectric stack,
form a beta dielectric block across a beta line trench from the beta block mask portion of the pattern, and
form a gamma dielectric block across a gamma line trench from the gamma block mask portion of the pattern; and

disposing metal in the gamma and beta line trenches to form an array of alternating parallel gamma and beta interconnection lines;
wherein the beta dielectric block extends across a beta interconnect line without extending into a gamma interconnect line and the gamma dielectric block extends across a gamma interconnect line without extending into a beta interconnect line.

10. The method of claim 1 wherein the mandrel layer, pattern layer and spacer layer are composed of different materials.

11. The method of claim 10 wherein the mandrel layer, pattern layer and spacer layer are composed of one of a titanium nitride, an amorphous silicon and a silicon oxide.

12. A method comprising:
providing a structure having a mandrel layer disposed over a pattern layer;
patterning the structure to form mandrels in the mandrel layer;
disposing a spacer layer over the mandrels;
etching the spacer layer to form spacers disposed on sidewalls of the mandrels, the spacers and mandrels defining alternating beta and gamma regions extending normally through the pattern layer;
etching a beta pillar mask over a beta region, the beta pillar mask not extending over any adjacent beta regions, the beta pillar mask extending over and defining a beta block mask portion of the pattern layer disposed within the beta region;
disposing a second lithographic stack of layers over the structure, the second lithographic stack including a resist layer as a top layer and a spin-on hardmask (SOH) layer as a bottom layer;
patterning the gamma pillar mask into the resist layer, the gamma pillar mask being disposed over a gamma region, the gamma pillar mask not extending over any adjacent gamma regions, the gamma pillar mask extending over and defining a gamma block mask portion of the pattern layer disposed within the gamma region;
anisotropically etching the lithographic stack through the SOH layer to form the gamma pillar mask into the SOH layer and to expose portions of the pattern layer in gamma regions not covered by the gamma pillar mask;
etching the structure to form a pattern in the pattern layer, the pattern including the gamma and beta block mask portions formed from the gamma and beta pillar masks; and
selectively etching the exposed portions of pattern layer to form gamma interconnect line locations of the pattern.

13. The method of claim 12 comprising:
the beta region extending through the mandrels, and
the gamma region extending through the portions of the pattern layer which are absent any overlaying spacers and mandrels.

14. The method of claim 12 comprising:
removing the gamma pillar mask to expose the gamma block mask portion;
disposing a third lithographic stack of layers over the structure, the third lithographic stack including a spin-on hardmask (SOH) layer as a bottom layer;
patterning the beta pillar mask into the SOH layer, the beta pillar mask being disposed over a mandrel in a beta region, wherein the mandrel overlays the beta block mask portion of the pattern;
anisotropically etching the SOH layer to expose a top surface of the mandrels without exposing the pattern layer in the gamma regions;
selectively etching away the mandrels from the beta regions to expose the pattern layer in the beta regions;
selectively etching the exposed portions of pattern layer in the beta regions to form beta interconnect line locations in the pattern; and
etching away the beta pillar mask and remaining portions of the SOH layer to expose the full pattern.

15. The method of claim 14 comprising:
disposing the pattern layer over an ultra low dielectric constant (ULK) layer disposed therein, the gamma and beta regions extending normally through the ULK layer;
etching the pattern to:
form gamma and beta line trenches in the gamma and beta regions respectively of the ULK layer,

Assignees

• Globalfoundries Inc

Inventors

• Kye Jongwook
• Wang Yan
• Wang Chenchen
• Wang Wenhui
• Yuan Lei
• Zeng Jia
• Bouche Guillaume

Classifications

• H10P50/73

  using masks for insulating materials · CPC title

• H10W20/089 Primary

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

• H10W20/031

  of conductive parts of the interconnections · CPC title

• H10D64/01334 Primary

  by defining the insulator using a sidewall spacer mask, a transformation under a mask or a plating at a sidewall · CPC title

• H01L21/28141

  Electricity · mapped topic