Communications assembly having logic multichannel communication via a physical transmission path for serial interchip data transmission

US9678917B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9678917-B2
Application numberUS-201214346943-A
CountryUS
Kind codeB2
Filing dateAug 6, 2012
Priority dateSep 27, 2011
Publication dateJun 13, 2017
Grant dateJun 13, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In a communications assembly having multiple users, one user is designated as a master and additional users are designated as peripheral modules, at least two of the peripheral modules as well as at least two interface modules are integrated into a shared physical implementation unit, and at least one interface module, which is designated as a slave, is unambiguously assigned to each of the at least two peripheral modules.

First claim

Opening claim text (preview).

What is claimed is: 1. A communications system having multiple users, comprising: one user being designated as a master; additional users being designated as peripheral modules; and multiple interface modules; wherein at least two of the peripheral modules and at least two interface modules are integrated into a shared integrated circuit, and wherein at least one interface module which is designated as a slave is unambiguously assigned to each of the at least two peripheral modules. 2. The communications system as recited in claim 1 , wherein the communications system is configured in the form of a ring in which the users are serially connected to one another. 3. The communications system as recited in claim 2 , wherein the at least two peripheral modules are connected to the master via a shared physical data interface. 4. The communications system as recited in claim 3 , wherein the shared physical data interface includes the interface modules which are assigned to the at least two peripheral modules. 5. The communications system as recited in claim 3 , wherein at least one of the two peripheral modules integrated into the shared integrated circuit has a separate interrupt channel provided via the assigned interface module for issuing soft interrupts. 6. The communications system as recited in claim 1 , wherein the shared integrated circuit is a single application-specific integrated circuit (ASIC). 7. A method for operating a communications assembly having multiple users, the method comprising: designating one user as a master; designating additional users as peripheral modules; integrating at least two of the peripheral modules and at least two interface modules into a shared integrated circuit; unambiguously assigning at least one interface module, which is designated as a slave, to each of the at least two peripheral modules; and exchanging data between the users. 8. The method as recited in claim 7 , wherein the data are exchanged between the at least two peripheral modules and the master via a shared data interface of the at least two peripheral modules. 9. The method as recited in claim 8 , wherein a logic communication channel is provided for each of the at least two peripheral modules via the shared data interface. 10. The method as recited in claim 9 , wherein the exchanged data are transferred continuously. 11. The method as recited in claim 7 , further comprising providing, in at least one of the two peripheral modules integrated into the shared integrated circuit, a separate interrupt channel via the assigned interface module for issuing soft interrupts. 12. The method as recited in claim 7 , wherein the shared integrated circuit is a single application-specific integrated circuit (ASIC). 13. A communications system having multiple users, comprising: one user being designated as a master; additional users being designated as peripheral modules; and multiple interface modules; wherein at least two of the peripheral modules and at least two interface modules are integrated into a shared physical implementation unit, wherein at least one interface module which is designated as a slave is unambiguously assigned to each of the at least two peripheral modules, wherein the at least two peripheral modules are connected to the master via a shared physical data interface, and wherein the shared physical data interface includes the interface modules which are assigned to the at least two peripheral modules. 14. The communications system as recited in claim 13 , wherein the communications system is configured in the form of a ring in which the users are serially connected to one another. 15. A communications system having multiple users, comprising: one user being designated as a master; additional users being designated as peripheral modules; and multiple interface modules; wherein at least two of the peripheral modules and at least two interface modules are integrated into a shared physical implementation unit, wherein at least one interface module which is designated as a slave is unambiguously assigned to each of the at least two peripheral modules, and wherein at least one of the two peripheral modules integrated into the shared implementation unit has a separate interrupt channel provided via the assigned interface module for issuing soft interrupts. 16. The communications system as recited in claim 15 , wherein the at least two peripheral modules are connected to the master via a shared physical data interface.

Assignees

Inventors

Classifications

  • using a clocked protocol · CPC title

  • using interrupt (G06F13/32 takes precedence) · CPC title

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • on a daisy chain bus · CPC title

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Frequently asked questions

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What does patent US9678917B2 cover?
In a communications assembly having multiple users, one user is designated as a master and additional users are designated as peripheral modules, at least two of the peripheral modules as well as at least two interface modules are integrated into a shared physical implementation unit, and at least one interface module, which is designated as a slave, is unambiguously assigned to each of the at …
Who is the assignee on this patent?
Rohatschek Andreas-Juergen, Thoss Dieter, Huck Thorsten, and 2 more
What technology area does this patent fall under?
Primary CPC classification G06F13/4256. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 13 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).