Semiconductor devices having through-electrodes

Patent metadata

Field	Value
Publication number	US-9673133-B2
Application number	US-201514939394-A
Country	US
Kind code	B2
Filing date	Nov 12, 2015
Priority date	Nov 12, 2014
Publication date	Jun 6, 2017
Grant date	Jun 6, 2017

Abstract

Semiconductor devices having through-electrodes are provided. The semiconductor devices may include a substrate, a through-electrode penetrating vertically through the substrate, a circuit layer on the substrate and metal lines in the circuit layer. The metal lines may include two first metals on opposing edges of a top surface of the through-electrode and second metals above the top surface of the through-electrode. At least some of the second metals may not vertically overlap the two first metals.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor substrate;
a through-electrode penetrating vertically through the semiconductor substrate;
a circuit layer on the semiconductor substrate; and
a plurality of metal lines in the circuit layer, the plurality of metal lines including:
two first metals on respective ones of opposing edges of a top surface of the through-electrode; and
a plurality of second metals above the through-electrode, wherein the plurality of second metals are disposed above the two first metals, and at least some of the plurality of second metals vertically overlap the top surface of the through-electrode and do not vertically overlap the two first metals, and

wherein there is no metal line that is overlapped by the at least some of the plurality of second metals and is between the top surface of the through-electrode and the at least some of the plurality of second metals.

2. The semiconductor device of claim 1 , wherein the top surface of the through-electrode has an oval shape that has a longer axis and a shorter axis, and
wherein the opposing edges of the top surface of the through-electrode are on the longer axis.

3. The semiconductor device of claim 2 , wherein the plurality of second metals extend in a direction that is substantially parallel to the shorter axis.

4. The semiconductor device of claim 2 , wherein the two first metals are spaced apart from each other along the longer axis by a first distance, and a length of the top surface of the through-electrode along the longer axis is greater than the first distance.

5. The semiconductor device of claim 1 , wherein no vertical line exists that intersects both one of the two first metals and one of the at least some of the plurality of second metals.

6. The semiconductor device of claim 1 , wherein the top surface of the through-electrode is flat or recessed.

7. The semiconductor device of claim 1 , further comprising a third metal above the plurality of second metals, wherein the third metal is electrically connected to at least one of the two first metals.

8. A semiconductor device comprising:
a through-electrode penetrating a semiconductor substrate, the through-electrode extending in a vertical direction;
a metal pad on the semiconductor substrate and on a top surface of the through-electrode; and
a metal line above and spaced apart from the top surface of the through-electrode,
wherein the metal pad includes a first pad and a second pad that contact respective ones of opposing edges of the top surface of the through-electrode,
wherein the metal line is between the first pad and the second pad in plan view such that the first and second pads do not vertically overlap the metal line, and
wherein there is no metal pad that is overlapped by the metal line and is between the top surface of the through-electrode and the metal line.

9. The semiconductor device of claim 8 , wherein the top surface of the through-electrode has an oval shape that has a longer axis and a shorter axis, and a width of the top surface of the through-electrode along the longer axis is greater than a distance between the first pad and the second pad along the longer axis.

10. The semiconductor device of claim 9 , wherein the metal line extends in a direction that is substantially parallel to the shorter axis.

11. The semiconductor device of claim 8 , wherein the top surface of the through-electrode is recessed toward a bottom surface of the through-electrode.

12. The semiconductor device of claim 8 , further comprising a dielectric layer between the through-electrode and the metal line, wherein the dielectric layer contacts an entirety of a portion of the top surface of the through-electrode that is exposed by the first and second pads.

13. A semiconductor device comprising:
a through-electrode extending through a substrate;
first and second lower metal patterns on the substrate, the first and second lower metal patterns contacting respective ones of opposing edge portions of an upper surface of the through-electrode and being spaced apart from each other to expose a central portion of the upper surface of the through-electrode; and
a plurality of upper metal patterns above the first and second lower metal patterns, at least some of the plurality of upper metal patterns overlapping the upper surface of the through-electrode and not overlapping the first and second lower metal patterns in plan view, and
wherein there is no lower metal pattern that is overlapped by the at least some of the plurality of upper metal patterns and is between the upper surface of the through-electrode and the at least some of the plurality of upper metal patterns.

14. The device of claim 13 , wherein the upper surface of the through-electrode has a non-circular shape.

15. The device of claim 14 , wherein the upper surface of the through-electrode has a longer axis and a shorter axis, and
wherein the opposing edge portions of the upper surface of the through-electrode are on the longer axis of the upper surface of the through-electrode.

16. The device of claim 15 , wherein the upper surface of the through-electrode has an oval shape.

17. The device of claim 15 , wherein the plurality of upper metal patterns extend in a direction that is substantially parallel to the shorter axis of the upper surface of the through-electrode.

18. The device of claim 13 , wherein the central portion of the upper surface of the through-electrode is recessed toward a lower surface of the through-electrode.

19. The device of claim 13 , further comprising a dielectric layer on the central portion of the upper surface of the through-electrode.

20. The device of claim 13 , wherein the at least some of the plurality of upper metal patterns are between the first and second lower metal patterns in plan view.

Assignees

• Park Jae-Hwa
• Moon Kwangjin
• Park Byung Lyul
• Bang Sukchul
• Samsung Electronics Co Ltd

Inventors

• Park Jae-Hwa
• Moon Kwangjin
• Park Byung Lyul
• Bang Sukchul

Classifications

• H10W20/2125

  Top-view shapes · CPC title

• H10W20/2134

  TSVs extending from the semiconductor wafer into back-end-of-line layers · CPC title

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W20/43

  Layouts of interconnections · CPC title