Embedded bridge structure in a substrate

Patent metadata

Field	Value
Publication number	US-9642259-B2
Application number	US-201314067677-A
Country	US
Kind code	B2
Filing date	Oct 30, 2013
Priority date	Oct 30, 2013
Publication date	May 2, 2017
Grant date	May 2, 2017

Abstract

Some novel features pertain to a substrate that includes a first dielectric layer and a bridge structure. The bridge structure is embedded in the first dielectric layer. The bridge structure is configured to provide an electrical connection between a first die and a second die. The first and second dies are configured to be coupled to the substrate. The bridge structure includes a first set of interconnects and a second dielectric layer. The first set of interconnects is embedded in the first dielectric layer. In some implementations, the bridge structure further includes a second set of interconnects. In some implementations, the second dielectric layer is embedded in the first dielectric layer. The some implementations, the first dielectric layer includes the first set of interconnects of the bridge structure, a second set of interconnects in the bridge structure, and a set of pads in the bridge structure.

First claim

What is claimed is:

1. A substrate comprising:
a first surface and a second surface, wherein the first surface is located on an opposite side to the second surface;
a first dielectric layer adjacent to the second surface;
a bridge structure embedded in the first dielectric layer, the bridge structure configured to provide an electrical connection between a first die and a second die, the first and second dies configured to be coupled to the substrate, the bridge structure comprising a first set of interconnects and a second dielectric layer, the first set of interconnects embedded in the first dielectric layer; and
a first solder resist layer, wherein the first solder resist layer covers a portion of the first surface of the substrate, and wherein the first solder resist layer comprises a first interconnect configured to couple to the first die and a second interconnect configured to couple to the second die.

2. The substrate of claim 1 , wherein the bridge structure further includes a second set of interconnects.

3. The substrate of claim 1 , wherein the second dielectric layer is embedded in the first dielectric layer.

4. The substrate of claim 1 , wherein the first dielectric layer includes the first set of interconnects of the bridge structure, a second set of interconnects in the bridge structure, and a set of pads in the bridge structure.

5. The substrate of claim 1 , wherein the bridge structure further includes a set of pads.

6. The substrate of claim 5 , wherein the set of pads is configured to couple to a first set of bumps and interconnects for the first die, the set of pads is also configured to couple to a second set of bumps and interconnects for the second die.

7. The substrate of claim 1 , wherein the substrate is a packaging substrate configured to be coupled to a printed circuit board (PCB).

8. The substrate of claim 1 , wherein the substrate is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

9. The substrate of claim 1 , wherein the first surface is a bottom surface of the substrate.

10. The substrate of claim 9 , further comprising a second solder resist layer, wherein the second solder resist layer covers a portion of a top surface of the substrate.

11. An apparatus comprising
a substrate, wherein the substrate comprises a first surface and a second surface, wherein the first surface is located on an opposite side to the second surface;
a first dielectric layer adjacent to the second surface;
a bridge means embedded in the first dielectric layer, the bridge means configured to provide an electrical connection between a first die and a second die, the first and second dies configured to be coupled to the substrate, the bridge means comprising a first set of interconnects and a second dielectric layer, the first set of interconnects embedded in the first dielectric layer; and
a first solder resist layer, wherein the first solder resist layer covers a portion of the first surface of the substrate, and wherein the first solder resist layer comprises a first interconnect configured to couple to the first die and a second interconnect configured to couple to the second die.

12. The apparatus of claim 11 , wherein the bridge means further includes a second set of interconnects.

13. The apparatus of claim 11 , wherein the second dielectric layer is embedded in the first dielectric layer.

14. The apparatus of claim 11 , wherein the first dielectric layer includes the first set of interconnects of the bridge means, a second set of interconnects in the bridge structure, and a set of pads in the bridge means.

15. The apparatus of claim 11 , wherein the bridge means further includes a set of pads.

16. The apparatus of claim 15 , wherein the set of pads is configured to couple to a first set of bumps and interconnects for the first die, the set of pads is also configured to couple to a second set of bumps and interconnects for the second die.

17. The apparatus of claim 11 , wherein the substrate is a packaging substrate configured to be coupled to a printed circuit board (PCB).

18. The apparatus of claim 11 , wherein the apparatus is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

19. The apparatus of claim 11 , wherein the first surface is a bottom surface of the substrate.

20. The apparatus of claim 19 , further comprising a second solder resist layer, wherein the second solder resist layer covers a portion of a top surface of the substrate.

21. A method for providing a substrate, comprising:
providing a first surface and a second surface, wherein the first surface is located on an opposite side to the second surface;
providing a first dielectric layer, wherein the first dielectric is located adjacent to the second surface;
providing a first set of interconnects embedded in the first dielectric layer so that the first set of interconnects is coupled via the first dielectric layer, the first set of interconnect configured as a bridge structure in the first dielectric, the bridge structure configured to provide an electrical connection between a first die and a second die;
providing a second dielectric layer on the first set of interconnects;
providing a first solder resist layer to cover a portion of the first surface of the substrate;
providing a first interconnect embedded within the first solder resist layer, wherein the first interconnect is configured to couple to the first die; and
providing a second interconnect embedded within the first solder resist laver, wherein the second interconnect is configured to couple to the second die.

22. The method of claim 21 , further comprising providing a second set of interconnects in the first dielectric layer.

23. The method of claim 21 , wherein the second dielectric layer is embedded in the first dielectric layer.

24. The method of claim 21 , wherein the first dielectric layer includes the first set of interconnects of the bridge structure, a second set of interconnects in the bridge structure, and a set of pads in the bridge structure.

25. The method of claim 21 , further comprising a set of pads coupled to the first set of interconnects.

26. The method of claim 25 , wherein the set of pads is configured to couple to a first set of bumps and interconnects for the first die, the set of pads is also configured to couple to a second set of bumps and interconnects for the second die.

27. The method of claim 21 , wherein the substrate is a packaging substrate configured to be coupled to a printed circuit board (PCB).

28. The method of claim 21 , wherein the substrate is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

29. The method of claim 21 , wherein the first surface is a bottom

Assignees

• Qualcomm Inc

Inventors

• Kim Chin-Kwan
• Bchir Omar James
• Kim Dong Wook
• We Hong Bok

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/252

  comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W70/63

  Vias, e.g. via plugs · CPC title

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W90/00 Primary

  Package configurations · CPC title