Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9640639-B2
Application number	US-201615019040-A
Country	US
Kind code	B2
Filing date	Feb 9, 2016
Priority date	Apr 12, 2012
Publication date	May 2, 2017
Grant date	May 2, 2017

Abstract

A semiconductor device including a transistor in which an oxide semiconductor is used for a channel formation region and which has a positive threshold voltage to serve as a normally-off switching element, and the like are provided. Stable electrical characteristics are given to the semiconductor device including the transistor in which an oxide semiconductor film is used for the channel formation region, and thus the semiconductor device has high reliability. In a semiconductor device including a transistor in which an oxide semiconductor film including a channel formation region, source and drain electrode layers, a gate insulating film, and a gate electrode layer are stacked in this order over an oxide insulating film, a conductive layer overlapping with the gate electrode layer with the channel formation region provided therebetween and controlling the electrical characteristics of the transistor is provided in the oxide insulating film including an oxygen excess region.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a conductive layer;
forming an oxide insulating film over the conductive layer, the oxide insulating film having a projection over the conductive layer;
performing oxygen doping treatment on the oxide insulating film to selectively form an oxygen excess region in the oxide insulating film;
performing polishing treatment on the oxide insulating film including the oxygen excess region to planarize the projection after the oxygen doping treatment;
forming an oxide semiconductor layer including a channel formation region over the planarized oxide insulating film;
forming a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer;
forming a gate insulating film over the oxide semiconductor layer; and
forming a gate electrode layer overlapping with the channel formation region with the gate insulating film interposed therebetween.

2. The method for manufacturing a semiconductor device, according to claim 1 , wherein a chemical mechanical polishing method is used for the polishing treatment.

3. The method for manufacturing a semiconductor device, according to claim 1 , wherein an ion implantation method is used for the oxygen doping treatment.

4. The method for manufacturing a semiconductor device, according to claim 1 , wherein the oxide insulating film and the gate insulating film are formed by a chemical vapor deposition method.

5. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the step of:
forming an insulating film containing aluminum oxide over the oxide semiconductor layer, the source electrode layer, the drain electrode layer, and the gate electrode layer.

6. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the step of:
forming an insulating film containing aluminum oxide under the conductive layer and the oxide insulating film.

7. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the step of:
forming an insulating film containing aluminum oxide between the conductive layer and the oxide insulating film.

8. The method for manufacturing a semiconductor device, according to claim 2 , further comprising the step of:
forming a first insulating film containing aluminum oxide under the conductive layer and the oxide insulating film; and
forming a second insulating film containing aluminum oxide over the oxide semiconductor layer, the source electrode layer, the drain electrode layer, and the gate electrode layer,
wherein the first insulating film is in direct contact with the second insulating film, and
wherein the conductive layer, the oxide insulating film, the oxide semiconductor layer, the source electrode layer, the drain electrode layer, the gate insulating film, and the gate electrode layer are between the first insulating film and the second insulating film.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei

Classifications

• H10P52/402

  of semiconductor materials · CPC title

• H10P50/642

  Chemical etching · CPC title

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H10P14/42

  using a gas or vapour · CPC title

• H10D30/0312

  characterised by the gate electrodes · CPC title